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Use FPGA as camera input - IPU CSI Parallel

Question asked by Haggay Tavyumi on Apr 18, 2016
Latest reply on Sep 5, 2016 by Haggay Tavyumi

Hello all


We have developed our own custom  board based on the iMX6D processor.


The board include also an FPGA used for image manipulations.


The FPGA sends the output image to the iMX6D using parallel CSI.


We have build the yocto 3.14.52 from the freescale git source:


meta-fsl-bsp-release.git - Freescale i.MX Yocto BSP Release Layer


The build command was based on the SabreSD build.


After that we made some modifications to the DTS and the kernel to fit our board.


Most of the changes are working good.


Only one issue is the CSI capturing the video from the FPGA.


the pins I have used to connect the video in are :


pinctrl_ipu1_1: ipu1grp-1 {


            fsl,pins = </*parallel camera interface 1*/


                MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04        0x10


                MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05        0x10


                MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06        0x10


                MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07        0x10


                MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08        0x10


                MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09        0x10


                MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10        0x10


                MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11        0x10


                MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12        0x10


                MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13        0x10


                MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14        0x10


                MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15        0x10


                MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16        0x10


                MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17        0x10


                MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18        0x10


                MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19        0x10


                MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN    0x10


                MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC        0x10


                MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK    0x10


                MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC        0x10






The format of the video is UYVY 16-bit 1280X720P.


The polarity fit to the IMX6SDLCEC document Figure 62.


We made a new driver in the linux-imx\drivers\media\platform\mxc\capture\ folder based on the OV5642 driver.

The driver is loading and a device have been crated in the /dev directory /dev/video0.

I have printed out the registers values:






CSI_SENS_CONF = 0x0000CB00



I have tried to use unit_tests tools to find out if the capture source is working.

I have used the command :

./mxc_v4l2_capture.out -iw 1280 -ih 720 -ow 640 -oh 480 -m 0 -r 0 -c 50 -f UYVY -fr 60 -d /dev/video0 test.yuv

As a result I have this error :"ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued" "VIDIOC_QBUF failed"

The size of the output file is 600kB.

After that I used the ./mxc_v4l2_output.out -iw 1280 -ih 720 -ow 640 -oh 480 -r 0 -f UYVY -fr 60 test.yuv command to view the file.

As a result to that I have the error :

"start time = 1454478394 s, 817478 us

v4l2_output: end of input file, g_frame_size=1843200, err = 614400

v4l2_output: no display because v4l need at least 1 frames

total time for 0 frames = 15315 us =  0 fps


Is there a way someone can help me get my hands on that problem?