i.mx6 spi master mode,cs hold time is 80 us,too long

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i.mx6 spi master mode,cs hold time is 80 us,too long

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dayuan
Contributor I

I use i.mx6 spi as master to communicate with a slave device.,The code source is L3.0.35_4.1.0.

I change kenel code to use spidev driver followed by "How to enable spidev for all SPI (1-5) for MX6".

I can send and recv spi data from spi2 ,the spi clk is 10MHz.

But I found the cs hold time CS6 is 80 us.

QQ图片20151024180104.png

The reg Sample Period Control Register (ECSPI1_PERIODREG) is 0x00.

I do not know why or what can I do to reduce the cs hold time?

struct spi_ioc_transfer tr = {

  .tx_buf = (unsigned long)writebuf,

  .rx_buf = (unsigned long)readbuf,

  .len = 256,

  .speed_hz  = 10000000,

  //delay_usecs;

  .bits_per_word = 32,

  .cs_change = 0,

  //pad,

  };

  ret = (spi_fd, SPI_IOC_MESSAGE(1), &tr);

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skrap
Contributor IV

Did you ever find a solution to this problem?  I'm facing the same issue.

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alejandrolozan1
NXP Employee
NXP Employee

Hi,

As I see, the SPI module uses GPIO as CS. You can try to use the internal SPI CS, that may reduce the time you mention.

You have to  change the board-mx6q_sabresd.c or your respective file with structures similar to the ones found below:

static int spi0_internal_chipselect[] = {

  MXC_SPI_CS(2),

};

static const struct spi_generic_pdata spi0_pdata __initconst = {

  .chipselect = spi0_internal_chipselect,

  .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),

};

Best Regards,

Alejandro

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