Re: 3 Wire SPI Working

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Re: 3 Wire SPI Working

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mohammedazlum
Contributor IV

Hello Mohammed,

Could you tell me that, how did you connect 3-wire SPI into iMX6x processor ? The output/input line from the slave connected to which pin of processor (whether MISO or MOSI) ?

3 wire SPI.png

Regards,

Azlum

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jamesdeepu
Contributor II

Dear Azlum,

I am also working on 3-Wire SPI. I read your posts. Can you clarify my doubts.

I have imx6 board with MOSI and MISO both Connected to SDI and SDO of LCD (Slave device).

On the slave side , SDO and SDI are connected together  where SDO is connected via a resistor

My query is

1) How will I tell linux kernel to use SPI-3 Wire mode

2) As per your previous discussion, MOSI should be connected via a resistor.?

3) In my case MISO is connected to SDO which is connected to SDI via a resistor(different from your case). Will that work out?

4) Bitbanging is only required if I don t connect MOSI to MISO via a resistor ?

pastedImage_0.png

Thanks in advance

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ask
Contributor III

Hi Mohammad,

We have imx28 customized board. LCDIF was interfaced to 3 wire spi display panel. The input/output line from the slave connected to both the pins i.e MISO and MOSI. Even in your case it should be connected like that.

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mohammedazlum
Contributor IV

Hi Ask,

Could you share the schematic portion to me ? Did you short MISO and MOSI of iMX6 and finally connected to 3-wire Slave bidirectional data line?

Regards,

Azlum

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ask
Contributor III

Hi Mohammed,


We did n't use the iMx6 and used imx28.
In my case slave is a output device and has unidirectional communication. Slave data input/output connected to MISO and MOSI pins of a Master.

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mohammedazlum
Contributor IV

Hi Ask,

If slave is output device, why did you short MISO and MOSI together? I think you can connect salve output line to MISO directly and leave MOSI as open.

Regards,

Azlum

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Yuri
NXP Employee
NXP Employee

  To avoid contention, output signals / pins should be configured as open drain.
It may be done for any pin functionality. 

Regards,

Yuri.

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mohammedazlum
Contributor IV

Hi Yuri,

If I configure MISO and MOSI as open drain, then the Master and Slave communication will be out of SPI protocol.

i.e, one side (Slave side) is 3-wire SPI interface and another side (Master side) is open drain interface.

Whether my statement is correct ?


Regards,

Azlum

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Yuri
NXP Employee
NXP Employee

The open drain just provides physical level of a communication protocol.

Regards,

Yuri. 

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mohammedazlum
Contributor IV

Hi Yuri,

i.e iMX6 SPI MOSI and MISO short together and configure MOSI as open-drain mode. In other words, SPI with MOSI open-drain mode.

What about MISO ? No need to configure as anything ?

Based on your input I modified my wiring diagram. Can you review the same ?

SPI-3 wire open mode.png

Regards,

Azlum

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Yuri
NXP Employee
NXP Employee

> What about MISO ? No need to configure as anything ?


Correct, no need to configure input.

Regards,

Yuri.

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mohammedazlum
Contributor IV

Hi Yuri,

When MOSI drive signal, the same signal can be feed into slave input and MISO of master. Is it create any problem or conflict ?

Regards,

Azlum

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Yuri
NXP Employee
NXP Employee

I do not think so.

~Yuri.

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mohammedazlum
Contributor IV

Hi Yuri, Thank you for the reply....


After configure MOSI as open-drain, do we need to use Bit-Banging Technique ?


Regards,

Azlum

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Yuri
NXP Employee
NXP Employee

No bit-banging needed. But pull up resistors (as for I2C) should be provided.

~Yuri.

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mohammedazlum
Contributor IV

Hello Yuri,

So iMX6x MISO and MOSI need to be shorted together and finally connect to 3-wire SPI slave bidirectional data line (I/P & O/P line). Is it like that ?

Then MOSI need to be configured as GPIO. Then what about MISO ? This pin no need to configure as anything ?

Regards,

Azlum

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Halotem12
Contributor I

iMX6x MISO and MOSI need to be shorted I have the same 3 wire spi connection in my application

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Yuri
NXP Employee
NXP Employee

  Assuming i.MX6 is SPI master, You may configure its MOSI output as open drain one
(via ODE bit field of corresponding IOMUXC_SW_PAD_CTL_PAD register) and
connect together i.MX6 MOSI, MISO and external SPI device I/O [I/P & O/P].

If needed, external device I/O should be configured for open drain too.

  When configuring GPIO, the Processor Expert for i.MX  may be useful.

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PROCESSOR-EXPERT-IMX

https://community.freescale.com/docs/DOC-101470

Also, the following app note helps to setup pin’s electrical properties.

“Influence of Pin Setting on System Function and Performance”

  http://www.freescale.com/files/32bit/doc/app_note/AN5078.pdf

Have a great day,
Yuri

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soledad
NXP Employee
NXP Employee

jamesbone , Can you please help?

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