Adding Support to i.MX6 for a New LCD without sync

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Adding Support to i.MX6 for a New LCD without sync

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krzysztofsza_ac
Contributor III

So it revelaed that Kernel for iMX has not built in support for lcd without sync and I need to add one :smileyhappy: I'll base on MX53UG document, chapter 18.4

1. I'm adding entry to /jb_422_110_build/kernel_imx/drivers/vie/mxc/Kconfig


config BT8110XTTDA

   depends on [???]

   tristate "BT8110XTTDA Panel"

First question - on what should I depend with this type of panel, on generif FB_MXC?

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igorpadykov
NXP Employee
NXP Employee

I think you can check how backlight is generated, enable PWM if necessary,

then check pin iomux setting for backlight.

View solution in original post

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krzysztofsza_ac
Contributor III

After a lot of testings it revealed that on Variscite demo board we also have the same warnings in logcat. So we came back to default settings (video=mxcfb0:dev=ldb,bpp=32) and finally found the reason why we didn't see anything. It's because something is disabling lcd backlight. When we connect backlight directly to power supply, not letting it be driven by processor, everything is working. We hava picture on display, like we should have.

But here comes other question - why backlight gets turned off?

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igorpadykov
NXP Employee
NXP Employee

I think you can check how backlight is generated, enable PWM if necessary,

then check pin iomux setting for backlight.

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krzysztofsza_ac
Contributor III

Hello Igor, according to your suggestions we finnaly found the reason.

Our DC step converter wasn't able to operate at 20kHz, so we changed it to 500Hz. If anyone would issue the same, changing it takes place in

/kernel_imx/arch/arm/mach-mx6/board-mx6q_var_som.c (for i.MX6Q)

and in "... platform_pwm_backlight" property .pwm_period_ns needs to be changed fo 2000000 (or any other value that you need)

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igorpadykov
NXP Employee
NXP Employee

Hi Krzysztof

Freescale i.MX6 BSPs support CLAAWVGA LCD (similar to BT8110XTTDA), kernel

parameter

video=mxcfb0:dev=lcd,CLAAWVGA, if=RGB666

also is discussed below

Re: How to display splash screen on parallel LCD in u-boot (i.MX6S)

So you can just try to run jb_422_110 with these kernel parameters,

however probably you will have to fine tune timings in struct fb_videomode[]

for custom specific LCD, if image will not be good.

~igor

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krzysztofsza_ac
Contributor III

Hello Igor!

I've made some test and:

1. on standard board_kernel_cmdline which has video=mxfcb0:dev=ldb,bpp=32 display is somehow working - I can see 4 linux penguins and Android shiny logo, but in the moment that I should see Android launcher, screen turns black. To be sure that problem doesn't belong to Android I've changed settings to never turn off screen (developer options -> stay awake)

2. on modified board_kernel_cmdline (video=mxcfb0:dev=lcd,CLAA-WVGA, if=RGB666) screen is blank from power on, so even u-boot doesn't display anything.

I've tried:

- echo -e -n '\033[9]' > /dev/tty0

- echo 0 > /sys/class/graphics/fb0/blank

One thing found in debug console I see is: "init: sys_prop: permission denied uid:1003  name:service.bootanim.exit". I'm not sure if this can cause a problem, but I've changed init.rc file in "on bootanimation" and replace "user graphics" to "user system" (I've found this solution on this forum), rebuilt UBIFS images, flashed - but this error still exists.

edit:

I've checked what's going on in logcat and found this:

W/imx6.gralloc( 2531): 32bpp setting of Framebuffer catched!

W/imx6.gralloc( 2531): using (fd=15)

W/imx6.gralloc( 2531): id           = DISP4 BG

W/imx6.gralloc( 2531): xres         = 800 px

W/imx6.gralloc( 2531): yres         = 480 px

W/imx6.gralloc( 2531): xres_virtual = 800 px

W/imx6.gralloc( 2531): yres_virtual = 1536 px

W/imx6.gralloc( 2531): bpp          = 32

W/imx6.gralloc( 2531): r            =  0:8

W/imx6.gralloc( 2531): g            =  8:8

W/imx6.gralloc( 2531): b            = 16:8

W/imx6.gralloc( 2531): width        = 127 mm (160.000000 dpi)

W/imx6.gralloc( 2531): height       = 76 mm (160.421051 dpi)

W/imx6.gralloc( 2531): refresh rate = 53.56 Hz

W/FslHwcomposer( 2531): open /sys/class/graphics/fb2 failed

W/FslHwcomposer( 2531): open /sys/class/graphics/fb3 failed

W/FslHwcomposer( 2531): open /sys/class/graphics/fb4 failed

W/FslHwcomposer( 2531): open /sys/class/graphics/fb5 failed

E/v_hwc   ( 2531): open /dev/graphics/fb0 failed

W/SurfaceFlinger( 2531): no suitable EGLConfig found, trying without EGL_FRAMEBU FFER_TARGET_ANDROID

E/Trace   ( 2531): error opening trace file: No such file or directory (2)

E/SurfaceFlinger( 2531): HWComposer: framebufferTarget is null

E/SurfaceFlinger( 2531): HWComposer: framebufferTarget is null

E/SurfaceFlinger( 2531): HWComposer: framebufferTarget is null

E/SurfaceFlinger( 2531): HWComposer: framebufferTarget is null

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igorpadykov
NXP Employee
NXP Employee

Hi Krzysztof

one can also look at boundary devices, they have support for more LCDs,

some also 800x480

http://boundarydevices.com/configuring-i-mx6-machines-different-screens-nitrogen6x-sabre-lite/

~igor

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krzysztofsza_ac
Contributor III

One thing that I was doing wrong was using "dev=lcd", as we'he connected our LCD to LVDS out with proper converter (SN75LVDS82DGG). In this case I should use "dev=ldb".

Digging around I've got the line "video=mxcfb0:dev=ldb,CLAA-WVGA,if=RGB666,bpp=16", but with this the only I can see is CLAA-WVGA - YouTube

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igorpadykov
NXP Employee
NXP Employee

Hi Krzysztof

if this parallel LCD is connected to i.MX6 LDB

port through converter SN75LVDS82DGG, then one needs

to have ldb kernel parameters with similar LCD resolutions,

I am not aware of such. So one needs to add support for

this ldb 800x480 LCD (from i.MX6 point of view) - "videomode lvds_wvga".

Similar to suggested MX53UG. One can look at atatched document

Chapter 6 or example of "Hannstar-XGA": static struct fb_videomode lvds_xga

[U-Boot] [PATCH 9/9] mx6qsabrelite: Add splaschscreen support

~igor

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krzysztofsza_ac
Contributor III

Okej, so we need to figure out all the parameters:

struct fb_videomode {

const char *name;/* optional */

u32 refresh;/* optional */

u32 xres;

u32 yres;

u32 pixclock;

u32 left_margin;

u32 right_margin;

u32 upper_margin;

u32 lower_margin;

u32 hsync_len;

u32 vsync_len;

u32 sync;

u32 vmode;

u32 flag;

};

If we do this, are the other values in kernel line fine? (dev=ldb,if=RGB666,bpp=16)

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igorpadykov
NXP Employee
NXP Employee

please check sect.18.3 Modifying Boot Kernel Parameters to Support a New LCD MX53UG

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