JTAG connection on schematics TWR-K70F120M-SCH

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JTAG connection on schematics TWR-K70F120M-SCH

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puspamnayak
Contributor III

Hi,

Greetings for the day...!!

I am using  MK70FN1M0VMJ12 for my project and was referring to tower board schematics and have query regarding JTAG connection given below:

1. How Reset will happen after JTAG connection ?

2. Can we connect JTAG connector directly to JTAG pins of processor or we have to introduce buffer (as given in schematics) so as to amplify signals before sending to JTAG pin of K70

3. How TRACE signals and EZ signals are addressed on the same pins of JTAG CONNECTOR J11

Please send me the steps how JTAG hardware will acknowlwdge with software and some more details on EZ and TRACE signals

Kindly reply ASAP

Thanks and regards,

Puspsam N

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DavidS
NXP Employee
NXP Employee

Hi Puspsam,

You do not have to use buffers.

Please look at following posts for additional help.

Can not talk to K60 via JTAG interface

K70 JTAG interface

Or if you want a SWD pinout:

Hacking the Teensy V3.1 for SWD Debugging | MCU on Eclipse

Regards,

David

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puspamnayak
Contributor III

Hi David,

Thanks for the answer. This will help surely and i want to know as you said buffers are not required then why in Tower board (K70) buffers were used for JTAG connection, is there any specific reason.

Secondaly i want to know in Reference manual its mentioned that JTAG interface has internal pull-up/ pull-down. So shall i need to add any additional pull-up/pull-down  on JTAG interface or internal pull-up/pull-down of K70 is enough for JTAG interface

Kindly help

Thanks and regards,

Puspam

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