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- Re: What is difference between reset by watchdog and via CLKCTRL_RESET?
What is difference between reset by watchdog and via CLKCTRL_RESET?
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What is difference between reset by watchdog and via CLKCTRL_RESET?
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When kernel/uboot resets using CLKCTRL soft-reset ROM boot usually is unable to boot from SD card. Then the ROM boot tries USB recovery, fails and then finally boots from SD card like it should before.
If the reset is done using watchdog ROM boot starts from SD card without any problem.
I have tried to change PERSISTENT bits but it is no secondary firmware issue. Also I've tried to reset PINCTRL for SSP0 and reset SSP0 - without effect.
OTP is not burned. LCD_D00...D06 and LCD_RS are set properly.
Because ROM boot starts always from SD card on power-on and after watchdog reset I guess it is not SSP0 clock polarity issue (ROM boot bug).
The problem always appears if CLKCTRL_RESET bit 0 (DIG) is set. But if bit 1 (CHIP) is set the problem appears usually but not always - rather random.
SD card reset by power cycle before CPU reset does not help so it is rather mx28 issue.
Is it hardware related or ROM boot specific problem?
examples of error codes:
# reboot
0x8020a014 ((DDI_SD_MMC_DEVICE_NOT_SUPPORTED)
0x8020a014
0x80502008 (ROM USB CONNECT TIMEOUT)
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
0x8020a009 (DDI_SD_BOOT_IMAGE_NOT_FOUND)
0x80502008
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
0x8020a014
0x80502008
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
0x8050100b (ROM LDR PAYLOAD CRC)
0x80502008
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
0x8050100b
0x8050100b
0x80502008
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
# reboot
0x8020A009
0x8020A009
0x80502008
PowerPrep start initialize power...
Configured for 5v only power source. Battery powered operation disabled.
igorpadykov
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Hi JohnU
difference between CLKCTRL_RESET bit 0 (DIG) and bit 1 (CHIP)
is that first resets only digital part of procesor.
Analog part (including PMU) is not reset. At boot stage ROM
assumes that PMU has default state (when procesor is powered up,
values HW_POWER_ XX registers have reset value as described in RM).
RM states that with software reset DCDC and power
module will not be reset.
So ROM may work incorrectly or unpredictable with software reset.
Regarding bit 1 (CHIP) random issues, one can debug them with jtag debugger
probably checking power_prep.c, seems this is brownout issue.
It is highly recommended to apply latest patches.
Steps for applying patches to (i.MX28 + L2.6.35_10.12.01_SDK)
Codes 0x8020A014, 0x8020a009 mean that device can not be seen,
may be related to TKT131240, you can try to use other SD and make
more investigations with oscilloscope for integrity of SD signals and its power.
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Thank you for the answer.
L2.6.35_1.1.0_130130 bootlets were used but "0002-MX28-imx-bootlets-Fix-repeated-boot-issue-with-5V-only-configuration.patch" wasn't fully applied indeed. However it didn't help.
The real reason was SD signals integrity distroyed by reversed clock polarity (ROM issue). Oscilloscope probe on clock signal eliminates the problem...
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John
This discussion is closed since no activity. If you still need help, please feel free to reply with an update to this discussion, or create another discussion.
Thanks,
Yixing
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John
Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help, please feel free to reply with an update to this discussion.
Thanks,
Yixing
