MSCAN module, CANCTL1_CANE... possible to go from 1 to 0?

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MSCAN module, CANCTL1_CANE... possible to go from 1 to 0?

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chrispawlak
Contributor I

I'm working with the MCF51JM128 Coldfire Microcontroller. Is it at all possible to change CANCTL1_CANE from 1 to 0?  I understand that CANE is write-once, but the following from the MCF51JM128 reference manual seems to imply there is a way around that. Regarding the CANCTL1 register:

 

Write: Anytime when INITRQ = 1 and INITAK = 1, except CANE that is write once in normal and

anytime in special system operation modes when the MSCAN is in initialization mode (INITRQ = 1 and

INITAK = 1).

 

I already found out that merely putting MSCAN in initialization mode is not enough to be able to change CANE to 0. What are these "special operation modes," and would they indeed allow me to change CANE to 0?

 

The reason I'm asking is that I would like to be able to temporarily use the TXCAN pin as a GPIO for diagnostic purposes, but at a point after which the MSCAN module has already been enabled (i.e. CANCTL1_CANE = 1).  And I would like to do this without having to do a hard reset on the microcontroller.

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TomE
Specialist II

So what is a "special system operation modes"? The next thing to do is to search the entire Reference Manual for that phrase ... and that's the only mention.

So search for "special system" and match on "special system test modes" in the same chapter, but nowhere else.

So I'm now guessing that that the ability to override the "write once" characteristic might be shared by other "write once" bits, like the ones in SOPT1. No, they seem to be only write-once with no documented override.

The problem here is that these chips are assembled from "modules", and those modules come with documentation chapters, which are put together to make the Reference Manual. Phrases and keywords in one chapter may match similar keywords in other chapters FOR OTHER CHIPS, and even other FAMILIES of chips (ARM, PPC, HCS12), but the particular set of chapters for your chip may not match up as well as other Reference Manuals. So it is worth performing "archaeology" on different manuals to see if you can see where that phrase may have made more sense. The CAN Silicon Module has a "pin" on it which controls the CANE bit, and indicates the CPU is in a "special mode".

Surprisingly, searching Freescale's site for "CANE that is write once in normal and anytime in special system operation modes" only gets a match in that manual.

Searching for "anytime in special system operation modes" gets 10 matches. One match is in your manual, but the other 9 are in "9S12" manuals, which shows where this CAN module was previously used. So it can be reset in a 9S12 "special system mode", and the chapter only makes sense when read in an MC9S12 Reference Manual.

Sure enough, in the MC9S12Q128 Manual it says the CPU can be in one of 8 modes controlled by MODA, MODB and MODC pins, and some of those modes are considered to be "4.4.3.2 Special Operating Modes".

The MCF51 CPU has Debug, Secure, Run, Wait and 4 Stop modes. If forced to guess I'd say the "Debug" is the only "Special Mode" here. and that the MCF "Debug Mode" wire is connected to the CAN module's "Special Mode" input.

Which doesn't solve your problem at all. There's no way to get this pin to be GPIO. Your only option to "blink a LED" would be to transmit CAN data on that pin, but note you can't usually or easily stop it transmitting if it can't finish transmitting.

Tom

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Doodi
Contributor I

Hi, 

How can i get bsdl-file of MMC2001HCPV16B.

There is any option from NXP website? (i did not find)

Thank's Doodi

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TomE
Specialist II

This forum is for Coldfire and M68k parts. The MMC2001 is an MCORE part, so this isn't the right forum.

There's isn't a "right" forum for this 1997 part that has been obsolete for decades. There doesn't seem to be a relevant forum for this chip, so I guess that's why you posted here. But why reply to a 2014 post on a completely different subject?

This chip has a JTAG port, but I suspect it is only used to support the ONCE debug connection. It doesn't look like Freescale released a BSDL file. There's one for a related part (MMC2114) here, if that's any help:

https://bsdl.info/list.htm?m=15&page=4

What could you do with this file if you could find it?

Tom

 

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TomE
Specialist II

So what is a "special system operation modes"? The next thing to do is to search the entire Reference Manual for that phrase ... and that's the only mention.

So search for "special system" and match on "special system test modes" in the same chapter, but nowhere else.

So I'm now guessing that that the ability to override the "write once" characteristic might be shared by other "write once" bits, like the ones in SOPT1. No, they seem to be only write-once with no documented override.

The problem here is that these chips are assembled from "modules", and those modules come with documentation chapters, which are put together to make the Reference Manual. Phrases and keywords in one chapter may match similar keywords in other chapters FOR OTHER CHIPS, and even other FAMILIES of chips (ARM, PPC, HCS12), but the particular set of chapters for your chip may not match up as well as other Reference Manuals. So it is worth performing "archaeology" on different manuals to see if you can see where that phrase may have made more sense. The CAN Silicon Module has a "pin" on it which controls the CANE bit, and indicates the CPU is in a "special mode".

Surprisingly, searching Freescale's site for "CANE that is write once in normal and anytime in special system operation modes" only gets a match in that manual.

Searching for "anytime in special system operation modes" gets 10 matches. One match is in your manual, but the other 9 are in "9S12" manuals, which shows where this CAN module was previously used. So it can be reset in a 9S12 "special system mode", and the chapter only makes sense when read in an MC9S12 Reference Manual.

Sure enough, in the MC9S12Q128 Manual it says the CPU can be in one of 8 modes controlled by MODA, MODB and MODC pins, and some of those modes are considered to be "4.4.3.2 Special Operating Modes".

The MCF51 CPU has Debug, Secure, Run, Wait and 4 Stop modes. If forced to guess I'd say the "Debug" is the only "Special Mode" here. and that the MCF "Debug Mode" wire is connected to the CAN module's "Special Mode" input.

Which doesn't solve your problem at all. There's no way to get this pin to be GPIO. Your only option to "blink a LED" would be to transmit CAN data on that pin, but note you can't usually or easily stop it transmitting if it can't finish transmitting.

Tom

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chrispawlak
Contributor I

Thanks for the response. I got further confirmation from Freescale that I cannot change CANE from 1 to 0:

"The CANE bit in the CANCTL1 register is a write once bit and can not been changed afterwards. Actually this is a security feature to avoid the programmers from setting the CAN lines as GPIO and increase the reliability of the CAN module. (This is really backwards what you would like to do.) The statement of the manual you quote is truncated from other parts and the "special operation modes" is not applied to MCF51JM128. Sorry for the confusion."

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TomE
Specialist II

> I got further confirmation from Freescale

You're in communication with someone who was able to clarify that quickly. That's good.

> the "special operation modes" is not applied to MCF51JM128. Sorry for the confusion."


Are they going to do anything about this?


Can you please ask them WHEN they're going to release a fixed version of the manual (V2 2009, 5 years old) or release a "Reference Manual Addendum" to address this error?


That chapter has been lifted from the manual for a  completely different part, and wasn't edited to be correct for the new part.


This happens a lot. For instance, the PIT in all ColdFire parts derives from a simpler "Interval Timer" in a MMC2001 part released in 1998. That was modified in an unfortunate way to be the PIT in the MMC2107 part and problems/bugs/omissions that crept in to that manual have been copied into ALL MCF manuals from then on. One "minor problem" (that if you get unlucky can give a 24% timing error) got copied into all the header files for the PIT registers too. I tried to get this fixed in 2010:

Re: PIT hw boo-boo. Read if you need accurate PIT (CF)


Tom

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