Hi,
Using CW10.2 and MQX3.8, CPU is K10FN1M0, crystal is 10MHz.
At debug session SW execution stops here:
while((MCG_S & MCG_S_OSCINIT0_MASK) == 0x00U) { /* Check that the oscillator is running */
}
Problem is that crystal doesn't start at debug session (measured with oscillosscope).
Then target board power OFF and power ON, SW runs OK.
Is it possible that SW download and flashing leaves CPU's MCG in such state which prevents crystal startup,
and power-off corrects the problem.
Or does cpu.c:__pe_initialize_hardware() need some extra settings?
Tested with both Debugger downloads: "Perform Standard Download" and "Execute Task" K10FN1M0 Programmer, same problem.
Tested with different crystal parameters: bypass cap, low power/high gain.
Same problem at debug session, but starts OK at power-on.
Have you run this model K10 with crystal in CW debugger?
~Mark
Solved! Go to Solution.
Errata has the answer: e3925: JTAG/OSC: JTAG enables digital input buffers
CPU has the mask: 0N96B
Changing RANGE0=2 -> 1 helps, at most cases SW starts.
Is there any method to disable CPU-component Code generation?
The selection "Don't Write Generated Component" is not allowed at CPU Component.
~Mark
Hi Mark,
many, many thanks for pointing to that silicon errata and problem. I bumped into that exactly problem on a K60 :-(.
And at least with MCU10.5 I can disable code generation: see USB with the TWR-K60F120M and TWR-K70F120M | MCU on Eclipse
Thanks again!
Hi,
could you post some project reproducing the problem?
If you are using Processor Expert, the code depends on the CPU component settings and the setup must match the real hardware. Do you use some evaluation board?
best regards
Petr Hradsky
Processor Expert Support Team
Hi Petr,
I was running into that same issue with the K60. I have posted an example project here:
Question: how can I affect the RANGE bits? I have not found a setting for this in the Cpu component settings.
Thanks,
Erich
Errata has the answer: e3925: JTAG/OSC: JTAG enables digital input buffers
CPU has the mask: 0N96B
Changing RANGE0=2 -> 1 helps, at most cases SW starts.
Is there any method to disable CPU-component Code generation?
The selection "Don't Write Generated Component" is not allowed at CPU Component.
~Mark
Just to confirm, for others who may come across this, I have seen this same problem on the TWR-K60F120M tower board. Sys Osc 0 is wired to an external 50MHz oscillator module and always works. Sys Osc 1 is wired to a 12MHz crystal. This does not start and run when JTAG is active.
You don't see a problem using the default BSP because Sys Osc 0 is used as the source for the system clock (via PLL0). But if you change your custom BSP to use Sys Osc 1 as the source for PLL0, you find that when using the debugger the PE-generated code hangs at startup waiting for PLL0 to lock, because the oscillator has not started.
I did not have much luck with changing either HGO1 (as recommended by the errata) or RANGE1 (as noted above). The best workaround seems to be to use an external oscillator rather than a crystal.