What does a Master ID of 0x0 for all AHB Prefetch Buffers do?

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What does a Master ID of 0x0 for all AHB Prefetch Buffers do?

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mitterha
Senior Contributor I

Hello,

the RT1020 flexspi_nor_polling_transfer demo project calls the function flexspi_nor_flash_init which gets the default config for flexspi and initializes most of the FlexSPI with default parameters.

The function GetDefaultConfig sets the Master IDs for all prefetch buffers to 0x0 because of the memset calls.

The RT1020 Reference Manual specifies in a note on page 1515

pastedImage_2.png

but I think that is exactly what the demo project/FLEXSPI_GetDefaultConfig function is doing.

  1. Could this be the reason for the performance issues in this post Negative effect of enabling Prefetcher for XIP from NOR flash memory (jeremyzhou‌)? I have the same performance issue when I use one flash with lower addresses XIP and higher addresses data and no caches active. If I calculate a crc of the data area I assumed that the prefetch buffer will be emptied all the time because of switching between XIP read and data read and both don't fit in one AHB prefetch buffer but maybe it is due to the master id for all buffers being set to 0.
  2. I'm wondering what does a Master ID of 0x0 for all AHB Prefetch Buffers do? Is now no AHB Prefetch buffer active? Will it just use the first buffer and 2. and third buffer are a waste of buffer space? Will it switch between buffers?
  3. What happens if you use 1kByte for buffers 0 to 2, therefore buffer size for buffer[3] will be 0? Should you disable prefetch for buffer 3?
  4. Why does a AHB Cachable Read check the FlexSPI TX buffer and not the read buffer?
    pastedImage_1.png
    pastedImage_2.png
  5. If we do not use stop mode is there any negative impact if we still enable CLRAHBBUFOPT?
    pastedImage_1.png

Kind regards,

Stefan

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jeremyzhou
NXP Employee
NXP Employee

Hi Stefan Mitterhauser,

Here is the reply from the A team and hope it can answer your inquiry.

That means the FlexSPI will still use only one buffer for single AHB master even assign multiple buffers to this master. The line in the RF is not clear.

Have a great day,
TIC

 

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jeremyzhou
NXP Employee
NXP Employee

Hi Stefan Mitterhauser,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) I'm working on the question now.
2-4) To provide the fastest possible support, I'd like to suggest you review the application note to learn the prefetch buffer impact of QSPI performance.

Have a great day,
TIC

 

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mitterha
Senior Contributor I

Thank you Jeremy, I read the application note. It is exactly like I thought. If there are a lot of jumps between different addresses it will have a lot of hit misses in AHB buffer which will decrease performance.

Unfortunately the application note did not answer my questions 2, 3 and 5 so I would appreciate your help for these too.

Kind regards,

Stefan

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mitterha
Senior Contributor I

Hi jeremyzhou‌,

do you have answers for my questions 2, 3 and 5?

Kind regards,

Stefan

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jeremyzhou
NXP Employee
NXP Employee

Hi,

Thanks for your reply.
2) The master 0 is no different from other Master IDs, it also is restricted by the configuration of the AHB RX Buffer Control Register.
3) Yes, it's okay to disable the Buffer[3].
5) After testing, the previous conclusion of https://community.nxp.com/thread/528725  is not correct actually.

Have a great day,
TIC

 

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mitterha
Senior Contributor I

Hello Jeremy,

thank you for your answer.

2) The master 0 is no different from other Master IDs, it also is restricted by the configuration of the AHB RX Buffer Control Register.

As I said:

the RT1020 flexspi_nor_polling_transfer demo project calls the function flexspi_nor_flash_init which gets the default config for flexspi and initializes most of the FlexSPI with default parameters.

The function GetDefaultConfig sets the Master IDs for all prefetch buffers to 0x0 because of the memset calls.

 

The RT1020 Reference Manual specifies in a note on page 1515

pastedImage_2.png

but I think that is exactly what the demo project/FLEXSPI_GetDefaultConfig function is doing.

It is not allowed to assign a master ID to multiple AHB buffers, why does the NXP driver assign all buffers to the AHB Master ID 0x0?

Kind regards,

Stefan

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jeremyzhou
NXP Employee
NXP Employee

Hi,

Sorry for reply late because of Labor Day.
1) It is not allowed to assign a master ID to multiple AHB buffers, why does the NXP driver assign all buffers to the AHB Master ID 0x0?
-- Yes, it definitely makes the developers confused, and I'll contact the SDK software library team for confirmation.

Have a great day,
TIC

 

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mitterha
Senior Contributor I

Hi jeremyzhou‌,

did you get any feedback from the SDK team?

Kind regards,

Stefan

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jeremyzhou
NXP Employee
NXP Employee

Hi Stefan Mitterhauser,

Here is the reply from the A team and hope it can answer your inquiry.

That means the FlexSPI will still use only one buffer for single AHB master even assign multiple buffers to this master. The line in the RF is not clear.

Have a great day,
TIC

 

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mitterha
Senior Contributor I

Thank you!

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