hi,
now we are porting Tianma TM050JDHC02 panel into imx8mq custom board. with vendor provided panel config as below,
#define LCM_PCLK 82
#define LCM_HACT 720
#define LCM_HFP 92
#define LCM_HBP 80
#define LCM_HSA 20
#define LCM_VACT 1280
#define LCM_VFP 200
#define LCM_VBP 16
#define LCM_VSA 2
#define LCM_NLANE 4
#define LCM_VDOMODE 0
#define LCM_MIPISPEED 500
Our question is, if we set LCM_PCLK to 82Mhz or 120Mhz to "clock-frequency" in DTS (please refer to DTS.txt), then panel will show nothing, and you will have a of of
[ 1.474487] [drm] Cannot find any crtc or sizes
[ 1.479995] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 0
you can refer the log of log inilog_82Mhz.log for full logs.
But if we set it to 132MHz, we it can show the display content, but if will have a log of
dcss-core 32e00000.dcss: Pixel clock set to 120000 kHz instead of 132000 kHz, difference is -12000000 Hz (inilog_132Mhz.log)
Can you help figure out what's wrong with clock-frequency setting in DTS? and what should we modify in DTS to have LCM_PCLK as 82Mhz?
thank you!
