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About SDRAM initialization sequence

Question asked by on Jan 14, 2020
Latest reply on Jan 20, 2020 by Yuri Muhin


Register list of initialization sequence is described in section of i.MX 7Dual Applications Processor Reference Manual, Rev. 1, 01/2018.
On the other hand, the initialization sequence of LPDDR3 device or JESD209-3C is as shown in the attached file.
Attachments include optional precharge ALL commands and CA training.
When the processing is performed according to the register list of the initialization sequence in section, are the options executed?

If options are not executed, can I add them?
If you can add an option, please tell me how.


best regards