MCUX 11.0.0 & LPC1769 - Peripheral Register memory view bugs

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MCUX 11.0.0 & LPC1769 - Peripheral Register memory view bugs

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danielholala
Senior Contributor II

Hi again,

I'm using MCUXpresso 11.0.0 and a LPC-Link2 probe with a LPC1769 board connected.

By selecting a peripheral in the "peripherals+ view", a "memory view" with details about the selected peripherals will be launched. The "memory view" shows the peripheral's registers and decodes their contend to simplify interpretation.

I'm running into issues regarding the peripheral register memory view

Here, ADC (ADC is powerd/clocked) and PCB have been selected.

1. The ADC register monitor behaves erratically. Sometimes it fails to show register content but displays an error message instead "<memory location not accessible>":

MCUX11-memory-ADCregister.PNG

This can be "fixed" by deselecting and selecting ADC in the "peripherals+ view".

2. The PCB ("pin control block") register's can not be decoded correctly. Instead the message "wrong field format" is shown:

MCUX11-memory-PCBregister.PNG

I assume these are bugs in the MCUXpresso 11.0.0 version. When I open the project in MCUXpresso 10.3, everything works as expected. By the way, I have not yet checked other peripherals in memory view.

Please advise!

Thanks.
Daniel

8 Replies

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lpcxpresso_supp
NXP Employee
NXP Employee

Yes, our investigation identified a remaining issue with MCUXpresso IDE v11.0.1 that could cause peripheral register accesses to sometimes fail - particularly when single stepping. This has been fixed in MCUXpresso IDE v11.1.0, as per the comment in the release notes.

Regards,

MCUXpresso IDE Support

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lpcxpresso_supp
NXP Employee
NXP Employee

OK, thanks. We'll do some further investigation.

Regards

MCUXpresso IDE Support

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danielholala
Senior Contributor II

LPCX presso support wrote:

OK, thanks. We'll do some further investigation.

 

Regards

MCUXpresso IDE Support

Hi LPCXpresso support,

can you please confirm that this issue been fixed in the new MCUXpresso 11.1?

The release notes include the following statement:

"Various fixes and enhancements to the Peripherals View, in particularly some registers being marked as inaccessible when single stepping"

Thanks.

Dan

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lpcxpresso_supp
NXP Employee
NXP Employee

Depending upon the host computer, target MCU and the probe being used, it is possible that you may see the message during the time the program is executing (when the Peripherals View isn't able to access memory).

With regards to the UART - I assume that the one you are using is clocked and enabled. Are you seeing the message with any specific register in the UART? A screen shot would be helpful here too.

Regards,

MCUXpresso IDE Support.

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skysat_junk
Contributor II

I just tried both UART0 and UART1 on the first line of code (default is for both to be powered).  The behavior is slightly different.  Everything is fine until you single-step.  UART1 shows everything as <memory location not accessible>.  UART0 shows no registers but the tooltip says "[Error: Unable to read peripheral data!], Disabled" (sometimes UART1 showed the same thing).  But even when it works, UART0.FIFOLEVEL and UART1.UADRMATCH show as <memory location not accessible> (the tooltips add the word 'Disabled').  Screenshots attached.

Randy

UART1_bad.JPGUART1_good.JPGUART0_bad.JPGUART0_good.JPG

1,249 Views
lpcxpresso_supp
NXP Employee
NXP Employee

This issue should be resolved with MCUXpresso IDE v11.0.1:

 

Regards,

MCUXpresso IDE Support

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skysat_junk
Contributor II

In 11.0.1, PCB may be working but UART1 still exhibits the same behavior described above.  Incidentally, PCB briefly shows the same "<memory location not accessible>" during a single-step.  UART1 shows the message and stays that way until (as the OP stated), you deselect and select UART1 again.  The OP used an LPC-Link2, I am using an LPC-Link and 1769.  SYSCTL isn't working either.

   Randy

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Daniel Kabs ,

Thanks for your sharing, I have reproduce the error on my side, and  I will report it to

IDE development team.

BR

Alice