I.MX8MMini Platform Device Driver to Access the address of GPIO and do a register read and register write operation

[santhosh2]

Hi,

Can any one help me with an I.MX8MMini example code of Platform Device Driver to Access the physical address of GPIO register and do a register read and register write operation

Regards

Santhosh Kumar

[igorpadykov]

Hi Santosh

one can look at examples for register access with memtool

memtool\test - imx-test - i.MX Driver Test Application Software 

GPIO Driver Interface — The Linux Kernel documentation 

Best regards
igor
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[santhosh2]

Hi Igor,

Checked but its a linux documentation,  tried its not working

Does is there any example where i can use to get the processor register address, so that i can then use the registers for configuring as out put for set and clear functionality,

Iam using GPIO3_IO22 pin as output PIN, Any Example or sample code  for I.MX8MMini would help me

Regards

Santhosh Kumar

[igorpadykov]

Hi Santhosh

I am afraid such ready for use driver is not availabe, one will have

to develop it himself.

Best regards
igor

[santhosh2]

Igor,

Thanks and I appreciate for honest reply,..

I have figured out a way to access the processor register address and now able to write driver, 

Initially i configured the GPIO Pin as input and was able to read the input pin status successfully. (Both Conditions Passed - input high to Low and Low to High)

However When i configure the GPIO Pin as output its not working. when I write to GPIO_DR the PIN is not getting High. I have checked the output of the PIN it shows zero voltage

and also observed that value in GPIO_DR  register is not getting written

I have followed as per the pseudocode in  page 1662  in the I.MX 8M Mini Applications Processor Reference Manual, Rev. 1, 03/2019

----------------------------------------------------page 1661----------------------------------------------------------------------------

8.3.2.2.2GPIO Write Mode

1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if needto read loopback pad value through PSR

2.  Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b).

3.  Write value to data register (GPIO_DR).

------------------------------------pseudocode-page 1662---------------------------------------------------------------------------

/ SET PADS TO GPIO MODE VIA IOMUX.
write sw_mux_ctl_pad_<output[0-3]>.mux_mode, <GPIO_MUX_MODE>
// Enable loopback so we can capture pad value into PSR in output mode
write sw_mux_ctl_pad_<output[0-3]>.sion, 1
// SET GDIR=1 TO OUTPUT BITS.
write GDIR[31:4,output3_bit,output2_bit, output1_bit, output0_bit,] 32'hxxxxxxxF
// WRITE OUTPUT VALUE=4’b0101 TO DR.
write DR, 32'hxxxxxxx5
// READ OUTPUT VALUE FROM PSR ONLY.
read_cmp PSR, 32'hxxxxxxx5

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Below is the Output what i am getting when i write to GPIO_DR register

 virtual address gpio:0x192e814c

--------------------------------------Output--------------------------------------------------------
[   22.256973] IOMUXC_SW_MUX_CTL_PAD_SAI5_RXD1:0x00000004     --- Default Value
[   22.262142] IOMUXC_SW_MUX_CTL_PAD_SAI5_RXD1:0x00000015    ---  MUX_MODE - ALT5 — Select signal GPIO3_IO22 & Software Input On Field -ENABLED — Force input path of pad SAI5_RXD1
[   22.267392] (IOMUXC_SW_PAD_CTL_PAD_SAI5_RXD1):0x00000000
[   22.272730] CCM_CCGR13 virtual address gpio:0x192F00D0
[   22.277973] CCM_CCGR13:0x00000002
[   22.281801] virtual address gpio:0x192F8000
[   22.286103] READ GPIO3_DIR:0x00000000
[   22.289347] READ GPIO3_DIR:0x00400000    -- Set GPIO3_IO22 PIN as output
[   22.292575] virtual address GPIO3_DR:0x192f8000 -- set GPIO3_IO22 in GPIO3_DR register

[   22.296818] READ GPIO3_DR:0x00000000  
[   22.296858] GPIO3_PSR:0x00000000    --- Read the Status

-------------------------------------------------------------------------------------------------------------

Let me know any thing i have to enable or missed during initialization

Regards

Santhosh Kumar

[santhosh2 · Accepted solution]

Thanks NXP team for support.. I was able to resolve the issue myself.. :smileyhappy:

Sol:- Virtual address was not getting mapped properly.. So needed to unmap and remap the new physical address to virtual address and then write the register config values

Regards

Santhosh Kumar S