ADC Accuracy in MKE04

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ADC Accuracy in MKE04

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prasannanaik
Contributor III

Hi,

   I am using MKE04Z64VLH4 in a control application. The ADC output is fluctuating a lot (Variation of 20 counts at DC input of 1.65V with only 3mV ripple in VDD and ADC input). 

While debugging, we have observed a note in datasheet to operate ADC in stop mode or wait state to get desired accuracy. I am trying to use wait state instruction in a PIT timer(625usec) but the controller gets stuck at that instruction whereas when i am using the same instruction in while(1), the controller works fine.

What exactly is the problem when shifting the controller to wait state inside PIT's ISR?

Also, Is there any other way wherein i don't have to stop or put the controller in wait state to get the desired accuracy as this wait/stop time is reducing the CPU utilization.

Please refer following code where i am facing the problem:

void PIT_Task_Channel0(void)

{

      ADC_SetChannel(ADC,ADC_CHANNEL_AD9);

      ADC_SetChannel(ADC,ADC_CHANNEL_AD13);

      asm("wfi");

}/*Code gets stuck at this brace*/

Thanks and best regards,

Prasanna

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jingpan
NXP TechSupport
NXP TechSupport

KE04 ADC shouldn't be so bad.I think you can

1. check VDD power supply. Is there ripple?

2. check Ras/Cas(Figure 16 in datasheet)

3. Please try the ADC example in KE04 SDK to see if the problem caused by hardware or software.

4. Check Vrefh noise. Reference voltage and supply voltage should come from low-impedance source, and this usually means sufficient number of ceramic decoupling capacitors close to Microntroller's pins.

There are some articles shows how to improve adc performance. You can also take a look.

Improving my ADC design 

AN5250

AN4373

If the processor enters sleep in an exception handler, and if the newly arrived interrupt request has the same or lower priority as the current exception, the processor will not wake up and will remain in a pending state. So, normally we never enter sleep in an exception handler.

Regards,

Jing

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