I'm working on S32R274 and I want to set the PLL with the following setup:
- Internal RC oscillator as the source for PLL0
- The PLL0 as the source for system clock
- PLL0 @ 160MHz setting prediv=2, mfd=40; rfd=2
To do that I should properly set the following registers:
And then check ME_GS to see if the setup was activated.
My questions are:
- What is the base address of the PLLDIG module?
- Is my setup correct?
Thanks in advance for the help!