MPC57XX - LINFlexD_0 Transmits on Port 2

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MPC57XX - LINFlexD_0 Transmits on Port 2

1,605 Views
cholland
Contributor V

Hi,

I am having an issue with LINFlexD_0.

The problem is that LINFlexD_0 is transmitting on Port 2.

The receive side works fine. It is receiving on Port_0.

It seems like it has to be an address issue.

It is like I am configuring LINFlexD_2 when I configure LINFlexD_0.

LINFlexD_0 is at a different base address than LINFlexD_2. So the addresses seems to be ok.

I never configure LINFlexD_2. I only configure LINFlexD_0.

I am developing the MPC5746C using the Evaluation Board:

Evaluation Board, MPC57XC/MPC57XG 32Bit MCU, 160MHz 32bit CPU, Supports MPC574XC/G Family

https://www.amazon.com/Evaluation-MPC57XC-MPC57XG-Supports-MPC574XC/dp/B01IO6LAXM 

I did change the default XTAL to 16MHz instead of the 40MHz clock.

I don't see any information about LINFlexD_0 and LINFlexD_2 being shared.

There are no issues with LINFlexD_4 or LinFlexD_5. I can't test LINFlexD_3. The pins aren't accessible.

The rest is code.

As always thank you so very much for your help!

/* Partial contents of MPC5746C.h */  

#define LINFlexD_0 (*(volatile struct LINFlexD_tag *) 0xFFE8C000UL)
#define LINFlexD_1 (*(volatile struct LINFlexD_tag *) 0xFBE8C000UL)
#define LINFlexD_10 (*(volatile struct LINFlexD_tag *) 0xFFEA0000UL)
#define LINFlexD_11 (*(volatile struct LINFlexD_tag *) 0xFBEA0000UL)
#define LINFlexD_12 (*(volatile struct LINFlexD_tag *) 0xFFEA4000UL)
#define LINFlexD_13 (*(volatile struct LINFlexD_tag *) 0xFBEA4000UL)
#define LINFlexD_14 (*(volatile struct LINFlexD_tag *) 0xFFEA8000UL)
#define LINFlexD_15 (*(volatile struct LINFlexD_tag *) 0xFBEA8000UL)
#define LINFlexD_2 (*(volatile struct LINFlexD_tag *) 0xFFE90000UL)
#define LINFlexD_3 (*(volatile struct LINFlexD_tag *) 0xFBE90000UL)
#define LINFlexD_4 (*(volatile struct LINFlexD_tag *) 0xFFE94000UL)
#define LINFlexD_5 (*(volatile struct LINFlexD_tag *) 0xFBE94000UL)
#define LINFlexD_6 (*(volatile struct LINFlexD_tag *) 0xFFE98000UL)
#define LINFlexD_7 (*(volatile struct LINFlexD_tag *) 0xFBE98000UL)
#define LINFlexD_8 (*(volatile struct LINFlexD_tag *) 0xFFE9C000UL)
#define LINFlexD_9 (*(volatile struct LINFlexD_tag *) 0xFBE9C000UL)

/* clock freq is 16000000 and baud rate is 115200 */

void LIN_lin0_init(const unsigned int _clock_freq, const unsigned int _baud_rate)
{
unsigned int part;
unsigned int fraction;
unsigned int integer;

LIN_lin0_pins_config();

/* Peripheral Control Register */
MC_ME.PCTL[50].B.RUN_CFG = 0x1; /* LINFlex 0: select peripheral configuration RUN_PC[1] */

/* LIN Control Register */
LINFlexD_0.LINCR1.R = 0x81; /* Enter Initialization Mode */

/* wait for the INIT mode */
while (0x1000 != (LINFlexD_0.LINSR.R & 0xF000)) {}

/* UART Mode Control Register */
LINFlexD_0.UARTCR.R = 1; /* set the UART bit first to be able to write the other bits */
LINFlexD_0.UARTCR.B.UART = 1; /* UART Enable, Req'd before UART configuration */
LINFlexD_0.UARTCR.B.WL1 = 0; /* 8 bits data when PCE = 0 or 8 bits data + parity when PCE = 1 */
LINFlexD_0.UARTCR.B.WL0 = 1; /* 8 bits data when PCE = 0 or 8 bits data + parity when PCE = 1 */
LINFlexD_0.UARTCR.B.TxEn = 1; /* Transmitter Enabled */
LINFlexD_0.UARTCR.B.RxEn = 1; /* Receiver Enabled */

LINFlexD_0.LINTCSR.B.MODE = 1;

LINFlexD_0.LINIER.B.DRIE = 1; /* Enable RX Interrupt */
LINFlexD_0.LINIER.B.DTIE = 1; /* Enable TX Interrupt */
INTC.PSR[376].R = 0x8001; /* Vector # 376 LinFlex0_0 LinFlex_0_RXI */
INTC.PSR[377].R = 0x8001; /* Vector # 383 LinFlex2_1 LinFlex_2_TXI */
/* UART Mode Status Register */
LINFlexD_0.UARTSR.B.SZF = 1; /* Clear the Zero status bit */
LINFlexD_0.UARTSR.B.DRFRFE = 1; /* Clear DRFRFE flag - W1C */

/* Baud Rate Calculation */
part = _clock_freq / _baud_rate; /* 347 */
integer = part / 16; /* 11 */
fraction = part - (integer * 16); /* 21 */

/* Baud Rate Register */
LINFlexD_0.LINIBRR.R = integer;
LINFlexD_0.LINFBRR.R = fraction;

/* LIN Control Register */
LINFlexD_0.LINCR1.B.INIT = 0; /* Exit Initialization Mode */

LIN_lin0_send_string("LIN 0 Initialized \r\n"); /* Sends string to port 2! */

}

void LIN_lin0_pins_config(void)
{
SIUL2.MSCR[PB2].B.PUS = 1;
SIUL2.MSCR[PB2].B.PUE = 1;

SIUL2.MSCR[PB2].B.SSS = 1; /* Source signal is LIN0_TX */
SIUL2.MSCR[PB2].B.OBE = 1; /* Input Buffer Enabled */
SIUL2.MSCR[PB2].B.SRC = 3; /* Full strength slew rate */

SIUL2.MSCR[PB3].B.IBE = 1; /* Input Buffer Enabled */
SIUL2.IMCR[712-512].B.SSS = 2; /* Source signal is LIN0_RX */
}

void LIN_lin0_send_string(const char * _xmt_msg)

{
int i, size;
size = strlen(_xmt_msg);
for (i = 0; i < size; i++) {
while( LIN_lin0_tx_char(_xmt_msg[i]) == 0);
}
}

unsigned char LIN_lin0_tx_char(const unsigned char _data )
{
/* Not ready to xmt */
if(linflexd0_tx_in_progress){
return 0;
}

LINFlexD_0.LINIER.B.DTIE = 1;
LINFlexD_0.BDRL.B.DATA0 = _data; /* Transmit 8 bits Data */
linflexd0_tx_in_progress = 1;

return 1;
}

void LINFLEX_0_TXI_ISR(void)
{
/* Clear the DTFTFF flag and not the other flags */
LINFlexD_0.UARTSR.B.DTFTFF = 1;

/* Data Transmitted Interrupt disable */
LINFlexD_0.LINIER.B.DTIE = 0;
linflexd0_tx_in_progress = 0;

}

void LIN_lin0_pins_config(void)
{
SIUL2.MSCR[PB2].B.PUS = 1;
SIUL2.MSCR[PB2].B.PUE = 1;

SIUL2.MSCR[PB2].B.SSS = 1; /* Source signal is LIN0_TX */
SIUL2.MSCR[PB2].B.OBE = 1; /* Input Buffer Enabled */
SIUL2.MSCR[PB2].B.SRC = 3; /* Full strength slew rate */

SIUL2.MSCR[PB3].B.IBE = 1; /* Input Buffer Enabled */
SIUL2.IMCR[712-512].B.SSS = 2; /* Source signal is LIN0_RX */
}

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8 Replies

1,264 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, I haven't heard of such issue. Is your header file up to date? What's its revision?

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1,264 Views
cholland
Contributor V

 * REVISION:  4.0.0   

Is there a newer version?

I remember I did have to add something at one time.

Thank you,

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1,264 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

I have revision 5.0.1 (attached).

However if RM revision 6.1 exists, also header file should be with this revision - I will check it

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1,264 Views
cholland
Contributor V

The header file got cut. 

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1,264 Views
cholland
Contributor V

It was the chip itself!

I tried using version 5.0.0. I had to add the missing message buffers 'MB' to the project, but that didn't seem to help. I still got the same results.

I had an extra chip, so I replaced it and Voila!

/* Fails */

SPC5746CSMKU6

IN84S

QAF1741AC.

/* Works */

SPC5746CSMKU6

IN84S

QAF1741AF.

Regards,

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1,264 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

It sounds interesting.

Maybe some shortcut in the socket? Have you tried to put failed one back to the socket and test it again?

Both pieces you have mentioned seems to be the same, I don't suppose errata, moreover I haven't found similar one.

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1,264 Views
cholland
Contributor V

Yep. That's it. It was a short.

LIN0 TX and LIN2 TX are next to each other on the chip and the pins were shorted.

Case closed! thanks,

1,264 Views
cholland
Contributor V

I remember now.

I went back to using version 4.0.0 because of an issue I had with the CAN buffers. 

MPC5746C.h 5.0.1 missing CAN buffers 

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