We have an iMX7D design, using the PF3001 PMIC and a single 16b DDR3L chip (512MB). Supply voltage bypassing follows the iMX7DSHDG recommendations.
While earlier versions of the memory stress test worked fine on early production boards to test the DDR3 layout (we ran it for days on multiple boards), we are seeing a consistent behavior with v2.6 and v2.9.2 and the current version of the design. We are running the uboot-jtag-mx7d version of the test, loading it into iram at 0x910000, and running it from uboot.
The memory stress test starts running, completes the t0.1 data is addr test, but always crashes part-way through the memcpy11 test. No error messages are generated. The system simply reboots.
We see this behavior independent of the DDR or CPU frequency being used. Increasing the core/SoC supply voltage up to 1.2 or 1.3V before running the test doesn't change the behavior.
This happens on boards that boot and run Linux (1GHz core, 533 MHz DDR3L) fine. This happens with DDR3L from different vendors.
Looking at the expected failure modes of the DDR stress test (from DRAM Controller Optimization for i.MX Application Processors), crashing is not listed.
Does NXP have any insight into this problem, or suggestions for tracking down the reason for this crash ?