My design use a imxrt1021 in LQFP144 package and a 32MB SDRAM directly connected routed in 2-layer board with good GND plane but with great distance for the plane (due to tickness of 2-layer PCB). This produce impedance mismatch for DQn/Dn/CKx/etc.
The design files is in:
In the hardware design manual it advice to put resistors on the pins of data and directions to avoid the reflection of the signals due to impedance mismatching. The dimensions of recommended tracks/vias in the PCB design rules is apparently specified for a 4-layer PCB with standard stackup, not for 2-layer.
But... when I see the refernece design (MIMXRT1020-EVK design files) the series resistors is 0ohm (sheet 12 of the document "SPF-29856_A3.pdf" inner MIMXRT1020-EVK-Design-Files.zip file)
The gerbers in the design package show a bad GND plane and many lines crossing. This is good practice?
Viewing this question:
I have the following doubts:
- Is reliable the routing of 1020 EVK?
- The R0 ohm in serie with data/address/control/clock lines is necesary?
- The absence of good ground plane is problematic?
- In any case... The problems may mitigate dropping down the CLK frecuency of SDRAM?
Many thanks for the time.