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Kernel when relocated outside of first 2MB of RAM

Question asked by Ryan Schaefer on Jul 6, 2017
Latest reply on Aug 31, 2018 by ALLEN BLAYLOCK

What is the correct way to reserve the lower 2MB of DDR for use with the M4 with the i.mx7? I am having trouble getting the kernel to successfully decompress at an address outside of the first 2MB of ram (address 0x00208000 exactly). When the kernel boots,


The motivation for relocating the kernel comes from this previous question: IMX7 M4 caching and execution speed

Summary: The M4 Cache only works with the first 2MB of DDR address space. In order to run the M4 out of DDR with the best performance, the binary should be loaded into this cache-able space.


The steps I have taken to use the lower 2MB:

  1. Modify the M4 ddr linker to start at address 0x80000000 (The M4 binary works correctly)
  2. Modify linux arch/arm/Makefile:139 to change TEXT_OFFSET to 0x00208000
  3. Add a reserved memory node to the dts to prevent the kernel from overwriting the M4 binary



2. Usually, ARM kernels decompress themselves at an offset of 0x8000 from the beginning of memory, which conflicts with the M4 cache-able zone. By changing textofs-y to 0x00208000 (arch/arm/Makefile:139), I am able to boot the kernel at a higher address, with a couple BUGS(). Is this the correct way to change the kernel entry point/where the kernel decompresses itself?


3. Here are the related nodes of the device tree:

memory {
   device_type = "memory";
   reg = <0x80000000 0x20000000>;
   linux,usable-memory = <0x80200000 0x3ff00000>;

reserved-memory {
   #address-cells = <0x1>;
   #size-cells = <0x1>;
   linux,cma {
      compatible = "shared-dma-pool";
     size = <0x14000000>;
   m4@80000000 {
     reg = <0x80000000 0x100000>;

The full dmesg output is attached

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