I have two T1042-based devices that each use two PCIe controllers in endpoint mode:
Both devices exhibit the same issue.
I have tried to take advantage of the advertised Expansion ROM feature on both of the PCIe controllers for each device (simultaneously and individually) with only limited success. I have found that address translation through the Expansion ROM BAR works as expected when used with the PCIe1 controller. However, attempting to do the same with PCIe2 or PCIe3 seems to suggest that address translation is somehow nonfunctional.
For example, configuring the PCIe2 or PCIe3 inbound expansion ROM ATMU window registers (PEXx_PEXEPROMITAR and PEXx_PEXEPROMIWAR) identically to PCIe1 results in:
I have tested mapping the Expansion ROM BAR to RAM and to parallel NOR flash. The configurations below work as expected with PCIe1, but not with PCIe2 or PCIe3.
My device has 8 GiB of RAM mapped from physical address 0x0_00000000 to 0x1_ffffffff. I attempt to map 64 KiB at 0x1_fffc0000:
My device has 256 MiB of NOR mapped from physical address 0xf_f0000000 to 0xf_ffffffff. I attempt to map 64 KiB at 0xf_f0060000:
I am glad to hear that the IP is identical. That is what the reference manual lead me to believe. However, I am still at a loss to explain the behavior that I observe. I have attached the following:
The issue could be complicated and it is more convenient to investigate it as a Technical Case:
The T1040/42 PEx IPs are identical.
Possible explanation of the issue is a misconfiguration.
Please provide as attachments:
1) U-Boot booting log (as text file)
2) raw memory dumps of the PEx Inbound ATMUs CCSR areas for all involved PEx controllers
3) Type 0 configuration headers registers for all involved PEx controllers