How to set 2D GPU, 3D GPU clocks to 396MHz frequency ?

[peteramond]

Dear All,

i.MAX6Q and 800MHz Memory based custom hardware.

The CCM_CBCMR register controls the clock source for the MMDC (memory controller) interfaces. The i.MX6 ROM configures this register so that the MMDC_CH0_CLK_ROOT and MMDC_CH1_CLK_ROOT clocks are sourced from the PLL2 main output (528 MHz). We can change these clocks to the PLL2-PFD2 output which runs at 396 MHz by adding the following lines into your DCD file in U-boot.

/* Configure MMDC clocks for 396 MHz operation */

DATA 4 0x020C4018 0x00260324

But when I get the clock dump I can see following (Please refer following clock dump)

gpu2d_core - 480000000

gpu2d_core_podf - 480000000

gpu2d_core_sel - 480000000

gpu2d_axi - 198000000

gpu3d_axi - 198000000

pcie_axi_sel - 198000000

vpu_axi_sel - 198000000

1) If the memory is running 396MHz don't we need to set above clock to 396MHz as well. (I need to use GPU,VPU with high load)

2) If I need to set above clocks to 396MHz how I can do it ? Do I need to do this in uboot in the same way I configure MMDC clock ?

I have attached clock dump here with.

Regards,

Peter.

-----------------------------------------------------------------------------------

root@remotecockpit:~# cat /sys/kernel/debug/clk/clk_summary | grep mmdc
mmdc_ch1_axi 0 0 396000000 0 0
mmdc_ch0_axi 3 3 396000000 0 0
root@remotecockpit:~# cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate accuracy phase
----------------------------------------------------------------------------------------
anaclk2 0 0 0 0 0
lvds2_in 0 0 0 0 0
anaclk1 0 0 0 0 0
lvds1_in 0 0 0 0 0
dummy 3 4 0 0 0
lvds2_sel 0 0 0 0 0
lvds2_gate 0 0 0 0 0
usbphy2_gate 1 1 0 0 0
usbphy1_gate 1 1 0 0 0
clk24m 0 0 24000000 0 0
osc 6 6 24000000 0 0
cko2_sel 0 0 24000000 0 0
cko2_podf 0 0 24000000 0 0
cko2 0 0 24000000 0 0
cko 0 0 24000000 0 0
gpt_3m 1 1 3000000 0 0
pll7_bypass_src 1 1 24000000 0 0
pll7 1 1 480000000 0 0
pll7_bypass 1 1 480000000 0 0
pll7_usb_host 1 1 480000000 0 0
usbphy2 1 1 480000000 0 0
pll6_bypass_src 1 1 24000000 0 0
pll6 1 1 500000000 0 0
pll6_bypass 1 1 500000000 0 0
pll6_enet 2 2 500000000 0 0
enet_ref 0 0 125000000 0 0
pcie_ref 1 1 125000000 0 0
pcie_ref_125m 1 1 125000000 0 0
sata_ref 1 1 100000000 0 0
sata_ref_100m 1 1 100000000 0 0
lvds1_sel 1 1 100000000 0 0
lvds1_gate 1 1 100000000 0 0
pll5_bypass_src 1 1 24000000 0 0
pll5 1 1 1188000000 0 0
pll5_bypass 1 1 1188000000 0 0
pll5_video 1 1 1188000000 0 0
pll5_post_div 1 1 297000000 0 0
pll5_video_div 1 1 74250000 0 0
ipu2_di1_pre_sel 0 0 74250000 0 0
ipu2_di1_pre 0 0 24750000 0 0
ipu2_di1_sel 0 0 24750000 0 0
ipu2_di1 0 0 24750000 0 0
ipu2_di0_pre_sel 1 1 74250000 0 0
ipu2_di0_pre 1 1 74250000 0 0
ipu2_di0_sel 1 1 74250000 0 0
ipu2_di0 1 1 74250000 0 0
ipu2_pclk0_sel 1 1 74250000 0 0
ipu2_pclk0_div 1 1 74250000 0 0
ipu2_pclk0 1 1 74250000 0 0
ipu1_di1_pre_sel 0 0 74250000 0 0
ipu1_di1_pre 0 0 24750000 0 0
ipu1_di1_sel 0 0 24750000 0 0
ipu1_di1 0 0 24750000 0 0
ldb_di1_sel 0 0 74250000 0 0
ldb_di1_div_7 0 0 10607142 0 0
ldb_di1_div_sel 0 0 10607142 0 0
ldb_di1 0 0 10607142 0 0
ldb_di1_div_3_5 0 0 21214285 0 0
ldb_di0_sel 0 0 74250000 0 0
ldb_di0_div_7 0 0 10607142 0 0
ldb_di0_div_sel 0 0 10607142 0 0
ldb_di0 0 0 10607142 0 0
ldb_di0_div_3_5 0 0 21214285 0 0
pll4_bypass_src 0 0 24000000 0 0
pll4 0 0 147456000 0 0
pll4_bypass 0 0 147456000 0 0
pll4_audio 0 0 147456000 0 0
pll4_post_div 0 0 36864000 0 0
pll4_audio_div 0 0 36864000 0 0
pll3_bypass_src 1 1 24000000 0 0
pll3 1 1 480000000 0 0
pll3_bypass 1 1 480000000 0 0
pll3_usb_otg 3 3 480000000 0 0
gpu2d_core_sel 0 0 480000000 0 0
gpu2d_core_podf 0 0 480000000 0 0
gpu2d_core 0 0 480000000 0 0
asrc_sel 0 0 480000000 0 0
asrc_pred 0 0 240000000 0 0
asrc_podf 0 0 30000000 0 0
asrc 0 0 30000000 0 0
esai_sel 0 0 480000000 0 0
esai_pred 0 0 240000000 0 0
esai_podf 0 0 30000000 0 0
esai_extal 0 0 30000000 0 0
periph2_clk2_sel 0 0 480000000 0 0
periph2_clk2 0 0 480000000 0 0
periph_clk2_sel 0 0 480000000 0 0
periph_clk2 0 0 480000000 0 0
pll3_60m 0 0 60000000 0 0
can_root 0 0 30000000 0 0
can2_serial 0 0 30000000 0 0
can1_serial 0 0 30000000 0 0
ecspi_root 0 0 60000000 0 0
ecspi5 0 0 60000000 0 0
ecspi4 0 0 60000000 0 0
ecspi3 0 0 60000000 0 0
ecspi2 0 0 60000000 0 0
ecspi1 0 0 60000000 0 0
pll3_80m 1 1 80000000 0 0
uart_serial_podf 1 1 80000000 0 0
uart_serial 1 2 80000000 0 0
pll3_120m 0 0 120000000 0 0
pll3_pfd3_454m 0 0 454736842 0 0
spdif_sel 0 0 454736842 0 0
spdif_pred 0 0 227368421 0 0
spdif_podf 0 0 28421053 0 0
spdif 0 0 28421053 0 0
pll3_pfd2_508m 0 0 508235294 0 0
ssi3_sel 0 0 508235294 0 0
ssi3_pred 0 0 127058824 0 0
ssi3_podf 0 0 63529412 0 0
ssi3 0 0 63529412 0 0
ssi2_sel 0 0 508235294 0 0
ssi2_pred 0 0 127058824 0 0
ssi2_podf 0 0 63529412 0 0
ssi2 0 0 63529412 0 0
ssi1_sel 0 0 508235294 0 0
ssi1_pred 0 0 127058824 0 0
ssi1_podf 0 0 63529412 0 0
ssi1 0 0 63529412 0 0
pll3_pfd1_540m 2 2 540000000 0 0
ipu1_di0_pre_sel 1 1 540000000 0 0
ipu1_di0_pre 1 1 108000000 0 0
ipu1_di0_sel 1 1 108000000 0 0
ipu1_di0 1 1 108000000 0 0
ipu1_pclk0_sel 1 1 108000000 0 0
ipu1_pclk0_div 1 1 27000000 0 0
ipu1_pclk0 1 1 27000000 0 0
hdmi_isfr 1 1 540000000 0 0
video_27m 0 0 27000000 0 0
pll3_pfd0_720m 0 0 720000000 0 0
usbphy1 0 0 480000000 0 0
pll2_bypass_src 1 1 24000000 0 0
pll2 1 1 528000000 0 0
pll2_bypass 1 1 528000000 0 0
pll2_bus 1 1 528000000 0 0
pll2_pfd2_396m 3 3 396000000 0 0
enfc_sel 0 0 396000000 0 0
enfc_pred 0 0 79200000 0 0
enfc_podf 0 0 19800000 0 0
enfc 0 0 19800000 0 0
gpmi_io 0 0 19800000 0 0
emi_sel 0 0 396000000 0 0
emi_podf 0 0 198000000 0 0
usdhc4_sel 0 0 396000000 0 0
usdhc4_podf 0 0 198000000 0 0
usdhc4 0 0 198000000 0 0
gpmi_bch 0 0 198000000 0 0
usdhc3_sel 0 0 396000000 0 0
usdhc3_podf 0 0 198000000 0 0
usdhc3 0 0 198000000 0 0
apbh_dma 0 0 198000000 0 0
per1_bch 0 0 198000000 0 0
gpmi_bch_apb 0 0 198000000 0 0
gpmi_apb 0 0 198000000 0 0
usdhc2_sel 0 0 396000000 0 0
usdhc2_podf 0 0 198000000 0 0
usdhc2 0 0 198000000 0 0
usdhc1_sel 0 0 396000000 0 0
usdhc1_podf 0 0 198000000 0 0
usdhc1 0 0 198000000 0 0
hsi_tx_sel 1 1 396000000 0 0
hsi_tx_podf 1 1 198000000 0 0
hsi_tx 1 1 198000000 0 0
axi_alt_sel 0 0 396000000 0 0
periph2_pre 0 0 396000000 0 0
periph2 0 0 396000000 0 0
mmdc_ch1_axi 0 0 396000000 0 0
periph_pre 1 1 396000000 0 0
periph 3 3 396000000 0 0
axi_sel 1 1 396000000 0 0
axi 3 3 198000000 0 0
openvg_axi 0 0 198000000 0 0
mlb 0 0 198000000 0 0
vpu_axi_sel 0 0 198000000 0 0
vpu_axi_podf 0 0 198000000 0 0
vpu_axi 0 0 198000000 0 0
vdo_axi_sel 0 0 198000000 0 0
vdo_axi 0 0 198000000 0 0
vdoa 0 0 198000000 0 0
emi_slow_sel 1 1 198000000 0 0
emi_slow_podf 1 1 99000000 0 0
eim_slow 1 1 99000000 0 0
pcie_axi_sel 1 1 198000000 0 0
pcie_axi 1 1 198000000 0 0
gpu3d_axi 0 0 198000000 0 0
gpu2d_axi 0 0 198000000 0 0
mmdc_ch0_axi 3 3 396000000 0 0
gpu3d_core_sel 0 0 396000000 0 0
gpu3d_core_podf 0 0 396000000 0 0
gpu3d_core 0 0 396000000 0 0
ipu2_sel 1 1 396000000 0 0
ipu2_podf 1 1 198000000 0 0
ipu2 1 1 198000000 0 0
ipu2_pclk1_sel 0 0 198000000 0 0
ipu2_pclk1_div 0 0 0 0 0
ipu2_pclk1 0 0 0 0 0
dcic2 0 0 198000000 0 0
ipu1_sel 1 1 396000000 0 0
ipu1_podf 1 1 198000000 0 0
ipu1 1 1 198000000 0 0
ipu1_pclk1_sel 0 0 198000000 0 0
ipu1_pclk1_div 0 0 0 0 0
ipu1_pclk1 0 0 0 0 0
dcic1 0 0 198000000 0 0
ahb 7 7 99000000 0 0
sdma 8 2 99000000 0 0
sata 0 0 99000000 0 0
rom 1 1 99000000 0 0
ocram 2 2 99000000 0 0
hdmi_iahb 1 1 99000000 0 0
esai_mem 0 0 99000000 0 0
esai_ipg 0 0 99000000 0 0
caam_aclk 1 1 99000000 0 0
caam_mem 1 1 99000000 0 0
asrc_mem 0 0 99000000 0 0
asrc_ipg 0 0 99000000 0 0
cko1_sel 0 0 99000000 0 0
cko1_podf 0 0 12375000 0 0
cko1 0 0 12375000 0 0
ipg 3 4 49500000 0 0
usboh3 0 0 49500000 0 0
uart_ipg 1 2 49500000 0 0
ssi3_ipg 0 0 49500000 0 0
ssi2_ipg 0 0 49500000 0 0
ssi1_ipg 0 1 49500000 0 0
spdif_gclk 0 0 49500000 0 0
spba 0 0 49500000 0 0
iim 0 0 49500000 0 0
gpt_ipg 1 1 49500000 0 0
enet 0 0 49500000 0 0
can2_ipg 0 0 49500000 0 0
can1_ipg 0 0 49500000 0 0
caam_ipg 1 1 49500000 0 0
ipg_per 0 0 49500000 0 0
pwm4 0 0 49500000 0 0
pwm3 0 0 49500000 0 0
pwm2 0 0 49500000 0 0
pwm1 0 0 49500000 0 0
i2c3 0 0 49500000 0 0
i2c2 0 0 49500000 0 0
i2c1 0 0 49500000 0 0
gpt_ipg_per 0 0 49500000 0 0
step 1 1 396000000 0 0
pll1_sw 1 1 396000000 0 0
arm 2 2 396000000 0 0
twd 1 1 198000000 0 0
pll2_198m 0 0 198000000 0 0
pll2_pfd1_594m 0 0 594000000 0 0
gpu3d_shader_sel 0 0 594000000 0 0
gpu3d_shader 0 0 594000000 0 0
pll2_pfd0_352m 0 0 352000000 0 0
pll1_bypass_src 0 0 24000000 0 0
pll1_bypass 0 0 24000000 0 0
pll1_sys 0 0 24000000 0 0
pll1 0 0 996000000 0 0
ckih1 0 0 0 0 0
ckil 0 0 32768 0 0

[igorpadykov]

Hi Peter

one can look at i.MX6SDL software (memory is running 400MHz), use

"imx6solosabresd" configuration and sect.5.1 Build configurations attached Yocto

Guide. In general, if the memory is running 396MHz there is no need to set GPU,VPU 

clock to 396MHz.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[peteramond]

Hi igorpadykov

Why it show following as 198MHz in above clock dump ?

gpu2d_axi - 198000000

gpu3d_axi - 198000000

pcie_axi_sel - 198000000

vpu_axi_sel - 198000000

Shouldn't it be 396MHz ?

Regards,

Peter

[igorpadykov]

Hi Peter

it may be changed by busfreq driver described in

Chapter 24 Dynamic Bus Frequency Driver attached Linux Manual.

Best regards
igor

[peteramond]

Hi igorpadykov

Can't we lover DDR frequency than 396MHz?

Normally I add following line to uboot to run DDR in 396MHz. Can't we lover this frequency in uboot ?

* Configure MMDC clocks for 396 MHz operation */

DATA 4 0x020C4018 0x00260324

Regards,

Peter.

[igorpadykov]

Hi Peter

you can do that in similar manner as linux busfreq driver:

jump to iram, reconfigure ddr frequency, then jump to ddr again.

Seems you should write custom codes for that procedure.

Best regards
igor