Freescale MQX™ 4.0.2.1 patch release

Document created by Enrique Ochoa Vazquez Employee on Sep 25, 2013Last modified by Enrique Ochoa Vazquez Employee on Sep 25, 2013
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The new Freescale MQX™ 4.0.2.1 patch release is now available on the www.freescale.com

 

 

·         Files available

 

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Name

Description

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FSL_MQX_4_0_2_1_RELEASE_NOTE

Freescale   MQX™ RTOS 4.0.2.1 Patch Release Notes

2

Freescale   MQX RTOS 4.0.2.1 Patch

This   patch release is based on the MQX™ RTOS 4.0.2 release and provides Software   workaround for Errata e7166.

This   patch release applies to TWR-K70F120M and TWR-K60F120 board support packages.

 

·         Patch Description

·         This patch provides a software workaround for Errata e7166, which is relevant to the Mask 3N96B silicon.

·         Errata: SoC: SDHC, NFC, USBOTG, and cache modules are not clocked correctly in low-power modes.

o   Errata Description: SDHC, NFC, USBOTG, and Cache controller modules are connected to a single master port on the crossbar switch through a multiplexer. While the modules are still clocked in Wait mode, the multiplexer clock, which is connecting the modules to the crossbar switch, shuts off at entry into low-power modes. This prevents the three modules either to complete bus transactions during a low-power mode entry, or to start new bus transactions when the system enters Wait mode (even though the modules themselves remain clocked in Wait mode). Because the cache tag clock and data RAM clock are gated off in Wait mode, cache contents may be corrupted at low-power entry.

·         Software workaround provided: To resolve the Cache Controller issue, all bus master operations for each module should be complete before requesting system entry into any low-power mode.

o   To prevent cache corruption at low-power mode entry in idle task and low power manager, the WFI instruction is encapsulated in a special code sequence. The code sequence is executed from a memory location that is not cached (SRAM_L is recommended). Additionally, the code sequence must execute without interruption from the start of the code sequence to the WFI. If an interrupt occurs between the start of the sequence and the WFI instruction, MQX dispatcher code ensures that the code sequence is restarted from the beginning.

 

·         Known issues

o   For known issues and limitations please consult the release notes document.

 

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