LVDS in split mode (dual lvds) is used. In this configuration, only LVDS0_CLK is used. What is the suggestion for the LVDS1_CLK? The HW user guide says that if this is unused, then to leave it floating. Would we also suggest the same for this case or would termination be more appropriate? Or is there some possible way to gate this clock? (if so, it isn't obvious in the RM)
According to the MX6 Developer's Guide, any unused LVDS pins should be left floating, so the LVDS1_CLK pair, in this case should be left floating. In order to minimize any potential EMC, the lands for those balls should not have any additional traces leading away.
To add a bit more information, the customer ran some tests and found that the clock gate bits for the LVDS1 are essentially ignored in Dual mode. The only way to disable it is if they are both disabled which is not helpful in this case. It seems that the Dual mode setting overrides the CG.