After a JTAG Reset with his GHS MULTI Probe on i.MX6 Hardware, read the SRC_SRSR register the corresponding reset source bits (JTAG reset) are not set.
SRSR = 0x1
WARM Boot = 0x0
jtag_sw_rst = 0x0
jtag_rst_b = 0x0
wdog_sw_rst = 0x0
ipp_user_reset_b = 0x0
cpu_reset_b = 0x0
ipp_reset_b = 0x1
Tried to reproduce this with my DSTRAM probe, and issued a "reset reset.system" command in DS-5 Debugger but Program Counter stays at current vaule.
Obviously my SRSR bits don't change either.
Seems " jtag_rst_b" is a HW reset, please check the connection between JTAG port and i.Mx6 JTAG_TRST pin. And confirm the waveform on rest pin when JTAG reset run.