Using TWR-SER2 with TWR-K70F120M for Ethernet

Document created by Martin Latal Employee on Aug 1, 2013
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TWR-K70F120M running MQX and RTCS can work with the Dual Phy on TWR-SER2. Below I list the modifications I did to the default BSP:

 

1) I add phy_dp83xxx.c and phy_dp83xxx.h to the bsp_twrk70f120m build project. These files are with MQX in /mqx/source/io/enet/Phy

 

2) I modify the BSP to use DP83xxx PHY for the Ethernet MACNET:

in the /mqx/source/bsp/twrk70f120m/init_enet.c:

 

#include "phy_dp83xxx.h"

const ENET_IF_STRUCT ENET_0 = {
     &MACNET_IF,
     //&phy_ksz8041_IF,
     &phy_dp83xxx_IF,
     MACNET_DEVICE_0,
     MACNET_DEVICE_0,
     BSP_ENET0_PHY_ADDR,
     BSP_ENET0_PHY_MII_SPEED
 };

 

3) MDIO line requires an external pull up resistor, per DP83849I Data sheet. As I didn't have one at the moment, I enable internal pull up on MCU pin PTB0.

in the /mqx/source/bsp/twrk70f120m/init_gpio.c:

 

//pctl->PCR[0] = PORT_PCR_MUX(4) | PORT_PCR_ODE_MASK; /* PTB0, RMII0_MDIO/MII0_MDIO   */
/* PTB0, RMII0_MDIO/MII0_MDIO   */
/* internal pull up enabled on MDIO */
pctl->PCR[0] = PORT_PCR_MUX(4) | PORT_PCR_ODE_MASK | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK; 

 

With these changes, the RTCS applications work over TWR-SER2 Dual PHY channel A.

 

On TWR-SER2, J8 and J9 are un-shunted, SW1 = 11000000, SW2 = 10100000

on TWR-K70F120M, J18 is configured to disable 50 MHz OSC, as I use 50 MHz clock source from TWR-SER2 U504 50 MHz output. This clock is used to provide reference clock for the MCU (EXTAL), as well as for the Dual PHY X1 input (RMII reference clock).

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