Introduction
LS1046A has four 32-bit/64-bit Arm® Cortex®-v8 A72 CPUs arranged as a single cluster of four cores. LS1046A shares a single 2 MB L2 with and maximum operation of 1.2 GHz, three PCI Express 3.0 controllers in a 23 mm x 23 mm package.
Overview
The following demo is part of a bundle of examples that shortly will be available in the LSDK. As can be seen in the video, there is a menu for the user to select the desired demo and start testing the different approaches the FRWY LS1046A TPU is capable of executing.
This example intends to show the CPU performance according to CoreMark or Dhrystone metrics. This results in CoreMarks/mW or DMIPS performance running on the LS1046A. The user is able to select the number of cores to use for the test and then the results come out as Performance (Iterations/second) and Watts. This is intended to show the customers the LS1046A capabilities of pure CPU performance despite the oriented application. With a cost lower than 10 dollars per unit, the LS1046A returns 32,000 CoreMarks while consuming an average of 10 W working at 1.2 GHz.
Block Diagram
Video
Products
| NXP Product | Link |
| FRWY LS1046A TP | LS1046A Freeway Board | NXP |
