Pins Tool for i.MX Application Processors V2 is available!

Document created by Erich Styger Employee on Oct 17, 2016Last modified by Erich Styger Employee on Oct 17, 2016
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A new version of the Pins Tool for i.MX Application Processors has been released and is available for download as desktop tool from Pins Tool for i.MX Application Processors|NXP.

 

The pins Tool for i.MX Application Processors is used for pin routing configuration,
validation and code generation, including pin functional/electrical properties,
power rails, run-time configurations, with the following main features:

  • Desktop application
  • Muxing and pin configuration with consistency checking
  • Multicore support
  • ANSI-C initialization code
  • Graphical processor package view
  • Multiple configuration blocks/functions
  • Easy-to-use device configuration
    • Selection of Pins and Peripherals
    • Package with IP blocks
    • Routed pins with electrical characteristics
    • Registers with configured and reset values
    • Power Groups with assigned voltage levels
    • Source code for C/C++ applications
    • Documented and easy to understand source code
    • CSV Report and Device Tree File
    • Localized for English and Simplified Chinese
  • Mostly Connected: On-Demand device data download
  • Integrates with any compiler and IDE

 

What's New

  • Added Label support to give signals a name
  • Added ‘Log’ and ‘Problems’ view to report conflicts between settings
  • Added support for templates to store user configurations as starting point for new configurations
  • Added ability to download and share data for devices, especially for off-network host machines
  • i.MX header files are now automatically part of the device data
  • Import of legacy Processor Expert .pe files
  • Export of register defines
  • Various bug fixes and documentation improvements

The release notes of the desktop application are attached to this article.

 

Import Processor Expert Files

A new importer has been added to import legacy Processor Expert for i.MX files:

 

Labels

Signals can now have user defined labels:

 

Templates, Kits, Boards and Processors

When creating a new configuration, it offers Templates, Boards and Processors.

Custom configurations can be stored as templates and then used for new configurations.

 

Board Specific Functions

With the provided board and kit configurations, there are now pre-configured initialization functions for major blocks on the board:

 

Export Data

To simplify downloading the device specific data for the desktop tool, the 'Export' function can be used to download and export the data. The data can be copied that way to another machine or all data for a set of devices can be loaded.

 

Export Registers

With the Export command the registers can be exported as text/source:

This is used to store the register values:

/*FUNCTION**********************************************************************
*
* Function Name : init_audmux_pins
* Description   : Configures pin routing and optionally pin electrical features.
*
*END**************************************************************************/


#define INIT_AUDMUX_PINS_IOMUXC_AUD5_INPUT_DA_AMX_SELECT_INPUT_VALUE            0x00000000   /*!< Register name: IOMUXC_AUD5_INPUT_DA_AMX_SELECT_INPUT */
#define INIT_AUDMUX_PINS_IOMUXC_AUD5_INPUT_TXCLK_AMX_SELECT_INPUT_VALUE         0x00000000   /*!< Register name: IOMUXC_AUD5_INPUT_TXCLK_AMX_SELECT_INPUT */
#define INIT_AUDMUX_PINS_IOMUXC_AUD5_INPUT_TXFS_AMX_SELECT_INPUT_VALUE          0x00000000   /*!< Register name: IOMUXC_AUD5_INPUT_TXFS_AMX_SELECT_INPUT */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DI0_PIN02_VALUE                  0x00000002   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DI0_PIN02 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DI0_PIN03_VALUE                  0x00000002   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DI0_PIN03 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DI0_PIN04_VALUE                  0x00000002   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DI0_PIN04 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DI0_PIN15_VALUE                  0x00000002   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DI0_PIN15 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA16_VALUE               0x00000003   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA16 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA18_VALUE               0x00000003   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA18 */
#define INIT_AUDMUX_PINS_IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA19_VALUE               0x00000003   /*!< Register name: IOMUXC_SW_MUX_CTL_PAD_DISP0_DATA19 */

 

 

We hope you will find this new release useful.

Thanks for designing with NXP! 

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