This content was originally contributed to lpcware.com by Jack Ganssle
In this project I looked at the relative performance of the LPC4350's M4 vs. M0 cores, emulating ARM's big.LITTLE approach.
In the last few years the industry has increasingly embraced the notion of using multiple processors, often in the form of multicore. Though symmetric multiprocessing – the use of two or more identical cores – has received a lot of media attention, many embedded systems are making use of heterogeneous cores.
A recent example is ARM’s big.LITTLE approach, which is specifically targeted to smart phones. A big Cortex-A15 processor does the heavy lifting, but when computational demands are slight it goes to sleep and a more power-frugal A7 runs identical code.
NXP’s LPC43xx also has two ARM cores: a capable Cortex-M4 and a smaller M0. Since power constraints are hardly novel to phones, my question was: “if we mirror the big.LITTLE philosophy, what is the difference in performance between the M4 and the M0?”
Original Attachment has been moved to: Ship.zip