This application provides a human interface via terminal (UART1) menus and numbered selections to select and play audible medical alerts that are generated algorithmically on the NXP LPC23xx. The medical alarms are designed to comply with the IEC 60601-1-8 standard for audible medical alarms. The IEC standard seeks to improve patient safety by standardizing medical audible and visual alarms. The audible portion of the standard specifies high, medium, and low priority alarms, and these are provided via a menu system. In addition, a test menu is added to facilitate analysis of the quality of the alarms generated and their compliance with the standard. Many previous applications used playback techniques to use pre-recorded alarm sounds for the alerts. An algorithmic approach provides a much more efficient, high-quality implementation compared to the pre-recorded sounds. Plus, the sounds can be customized to differentiate equipment while still staying within the parameter limits of the standard.
- IEC Alarm Detailed Documentation
Below are recommended microcontrollers for use in implementing this design to a system.
|Product||Pins||On-Chip Flash||On-Chip RAM||Comments|
|LPC2364||100||128KB||34KB||128KB flash/34KB RAM version of LPC2368, no SD/MMC|
|LPC2366||100||256KB||58KB||256KB flash version of LPC2368, no SD/MMC|
|LPC2368||100||512KB||58KB + 8KB||100-pin version of LPC2378, no external bus|
|LPC2378||144||512KB||58KB + 8KB||144 pin, similar to LPC2368 but more pins and a MiniBus (8-bit)|
|LPC2387||100||512KB||98KB||LPC2368 with 98KB SRAM|
|LPC2388||144||512KB||98KB||LPC2378 with 98KB SRAM and USB Host/OTG|
|LPC2458||180||512KB||98KB + 8KB||LPC2468 with 16-bit External Memory Interface|
|LPC2460||208||0KB||98KB + 8KB||Flashless LPC2468|
|LPC2468||208||512KB||98KB||Host/OTG/device, 32-bit ext. bus, 512KB flash/98KB RAM, 208 pin package|
|LPC2470||208||0KB||98KB + 8KB||LPC2460 with XGA LCD controller|
|LPC2478||208||512KB||98KB + 8KB||LPC2468 with XGA LCD controller|
- IEC Alarm Example Code
This design example shows possible hardware and software techniques used to implement the design. It is imperative that the viewer use sound engineering judgment in determining the fitness of this design example for any particular application. This design example may include information from 3rd parties and/or information which may require further licensing or otherwise. Additional hardware or software design may be required. NXP Semiconductors does not support or warrant this information for any purpose other than an informational design example.