i.MX27 mDDR Issue

Document created by jesseg Employee on Aug 21, 2012Last modified by Jodi Paul on May 23, 2013
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i.MX27 and i.MX31 Issues When Interfacing Micron's 78nm mDDRs

 

Micron is discontinuing some "-75" mDDR parts (133MHz) popular on i.MX27 and i.MX31 designs, newer "-6" are being used to replace the EOL devices. However, loss of data issues may be experienced when i.MX mDDR controller is used to interface with newer Micron's mDDR.

On some cases, the bootloader works, memory tests on RedBoot pass. However, Linux hangs when booting.

 

Here are the DDR Controller configuration changes that may be used to avoid the issue: (This configuration is not proven to work on every design, but has been validated on at least 3 different boards.)

ESDRAMC Configuration Registers

 

Set ESDCFG0/1 to 0x0079D72F

0xD800_1004 = 0x79D72F 

Drive Strength Control Registers

Use "Normal". i.MX27 Default. 

 

Enhanced MDDR Delay Line Configuration Debug Register

 

Set the ESDCDLYx to 0x002C0000

0xD800_1020 = 0x2C0000 
0xD800_1024 = 0x2C0000 
0xD800_1028 = 0x2C0000 
0xD800_102C = 0x2C0000


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