Q&A: Can LDO_2P5 be powered off for MX6DL USB OTG/PHY at stop mode?

Document created by Yixing Kong Employee on Aug 6, 2014
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Q:

 

To minimize i.MX6DL power consumption at stop mode, but needs i.MX6DL to wake-up by USB resume signal from Host PC. Can LDO_2P5(VDDHIGH_CAP) be powered off at stop mode in order to resume i.MX6DL by a USB resume signal that Host PC sends to i.MX6DL USBOTG(us as device mode only)?

 

In other words, can USB OTG detect resume signal from Host PC and generate wakeup interrupt during stop mode with following LDO condition?

-          LDO_USB is enabled and powered by USB_OTG_VBUS.

-          LDO_2P5 is disabled during stop mode.

-          LDO_1P1 is enabled during stop mode.

 

The system uses LPDDR2, hence LDO_2P5 can be powered off at stop mode(I know this is not allowed for DDR3 as DDR IO need 2P5 as pre-driver). Actually tested on SDP, the system can not be resumed without LDO_2P5 as DDR IO need 2P5 for DDR3.

 

A:

Please note that disabling the LDO_2P5 supply, you are also disabling the DRAM, as the DRAM pre-drivers are powered by this supply(!).

 

SDCKE is pulled down on the board, and it ensures that the DRAM is in proper state during DSM without LDO_2P5 power.

 

we recommend to keep LDO_2P5 on at any mode(include DSM mode). ldo_2p5 is also one of power for USB phy.

 

4.3.2.2 LDO_2P5

The LDO_2P5 module implements a programmable linear-regulator function from VDD_HIGH_IN.

The LDO_2P5 supplies the SATA Phy, USB Phy, LVDS Phy,

 

Actually I have tested on SDP, but we cannot resume the system without LDO_2P5 as DDR IO need 2P5 for DDR3.

 

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