• VF6xx QSPI write using eDMA

    Processor : VF6xx   Task : 1. Write external flash chip through QSPI 2. Need to transmit 512 Bytes, for one selecton of LUT sequence, so need to keep loading Tx buffer as and when the data gets pushed out of ...
    Nilesh Gujarathi
    last modified by Nilesh Gujarathi
  • VF6xx with a uSD XC 8GB

    Hello,   Is VF6xx able to access a uSD XC? I don't know if it possible to access it.   No problem with microSDHC but what happens with a 8GB microSDXC   Thank you very much
    JOSE LOPEZ
    last modified by JOSE LOPEZ
  • Temperature Delphi Model for MVF61NS151CMK50

    Hello,   Is there a Delphi model or could you please provide a Delphi model for component MVF61NS151CMK50 in order to perform a temperture simulation?   Regards,
    Juan Diaz
    last modified by Juan Diaz
  • vybrid

    My customer is using MVF61NS151CMK50, and need to caliberate DDR. I download PEx from web but have no license. I am apply license as attached but the license did not work. Is there any issue in my applying f...
    ryan shi
    last modified by ryan shi
  • License for DDRV on Driver Suite v10.4

    I have some troubles when tuning DDR3 for Vybrid. I install Driver Suite v10.4,I want to use DDRV to slove my problem,but license is needed. I Click"here" below and apply license at “ Figure 2”,...
    zhao zq
    last modified by zhao zq
  • ftm

    I'm trying to generate a PWM signal using FTM0, chan 0 on the Vybrid VF6. I'm basing it on App Note AN5142, section 3.1. The issue is I don't get any output. Here is the setup I'm using:      ftm = FTM...
    Ken Green
    last modified by Ken Green
  • Inter-core IRQ collisions on Vybrid

    Having two GPIO inputs on the same PORT (say PTB23 and PTD10, both being on PORT2), how do I properly configure the interrupts, so that one GPIO triggers the ISR on A5 only and the second on M4 only?
    Petr Kubiznak
    last modified by Petr Kubiznak
  • RESET pin

    Dear Sir   I refer to the VYBRIDFSERIESEC Rev.9. It is described as the follows at P69 NOTE. "RESET pin has a external weak pull UP requirement if LPDDR2 memory is required to support content retention in the...
    Eishi Shibusawa
    last modified by Eishi Shibusawa
  • UART register description missing

    In the Vybrid Reference Manual Rev. 7 (06/2014) the following registers have been part of chapter 49 (UART): UARTx_C5 UARTx_MODEM UARTx_WP7816T0   In Rev. 8 (11/2015) and newer Vybrid Reference Manu...
    Stefan Agner
    last modified by Stefan Agner
  • How to connect TWR-VF65GS10 to DSTREAM with DS-5?

    Hi, I've got a TWR-VF65GS10-KIT recently, and I am trying to connect it to the DSTREAM with DS-5 to do some debugging work. I tried to connect the board to DSTREAM with either the K20 JTAG Header (J2) or the Vybird J...
    Zhenyu Ning
    last modified by Zhenyu Ning
  • Is there a way to tell the device tree that the codec control via I2C is absent and there is only SAI2/I2S driver?

    I want to use the SIM5320 PCM interface with my twr-vf65gs10 Vybrid board (SAI2/I2S). I want to control the module SIM5320 via UART2 in my application. I want to mark that I set ALSA library in Linux kernel on the twr...
    lyudmila voronina
    last modified by lyudmila voronina
  • QSPI booting and MFG tool operation

    I have a VYBRID MVF60NN152CMK50 connected to a single QSPI flash. We would like to download an image using the MFG tool through the USB, power cycle and restart the application from flash. If we need to re-program the...
    Richard Gears
    last modified by Richard Gears
  • Vybrid GPIO

    I'm using a Vybrid MVF61NN151CMK50 processor (Emcraft SOM) and having some weird issues with the GPIO pins. I'm trying to drive some LEDs. The cathode of the LED goes to the 3.3V supply. The anode goes to a resistor (...
    Ken Green
    last modified by Ken Green
  • workaround for e8052 (RMII)

    Dear Sir   I want to ask the workaround for e8052. It is described  at 12.3.0.2 Internal RMII reference clock in VYBRIDHDUG Rev.1. I want to confirm the workaround based on "EXTERNAL CLOCK SOURCE" scheme...
    Eishi Shibusawa
    last modified by Eishi Shibusawa
  • Vybrid and MQX 5 support?

    Hi @ all does anybody know, if MQX 5 get's portet in the future on Vybrid? So, in the do "fact sheets" is a blank in colum of Vybrid... Thanks
    Rainer Stillhard
    last modified by Rainer Stillhard
  • What is the operating lifetime (service time) of the Vybrid?

    What is the Vybrid expected service time, i.e. how long can the Vybrid operate under Operating ratings?
    Vadim Aleynikov
    last modified by Vadim Aleynikov
  • Not able to get RESET_OUT# signal in software reboot

    Hello, I am working on VF61 module and collibri evaluation board V3.2A. I have observed that when there is a hard reboot I get reset RESET_OUT# signal through X3 -> B32 pin of collibri evaluation board, but when...
    drashti Parikh
    last modified by drashti Parikh
  • Reset safe scratch registers

    Hi , I would like to implement a boot counter in u-boot, therefore I would need some register where i can keep the boot counter value. This value shall not be reseted after a HW reset.   Usecase: System cold bo...
    Andreas Eipeldauer
    last modified by Andreas Eipeldauer
  • I want to connect FPGA and Vybrid with 32bit data bus

    Hello,   I want to connect FPGA and Vybrid with 32bit data bus and over 10bit address (acting like SRAM).   Vybrid series have 32-bit flexbus but must use multiplexing address and data.   If ddr...
    Jinseok Kim
    last modified by Jinseok Kim
  • How to setup Ethernet hardware on the VF61 Vybrid Phytec Cosmic+ Board under Timesys Linux ?

    Respected Colleagues, Timesys Support, Karina Valencia Aguilar,   the Ethernet connection is now on the table.   I can connect VF61 Vybrid Phytec Cosmic+ Board to the Windows PC only trough USB RNDIS. ...
    Dragan Kujovic
    last modified by Dragan Kujovic