• Vybrid QSPI boot flow

    I'm hoping someone up out there is familiar with the boot up flow of the Vybrid processor.  I have an OTS SOM that will be booting the A5 core from QSPI flash (located on the SOM) in DDR x2 mode, with the code en...
    Ken Green
    last modified by Ken Green
  • Vybrid VF50 BootROM fuse bank CRC checking

    Hi, we use SoC module Colibry VF50 produced by Toradex - module contains VF50 MPU, a NAND flash and a DDR3 ram. With original configuration from Toradex the MPU works properly. Original configuration uses ext.oscila...
    Jan Simak
    last modified by Jan Simak
  • Vybrid IAR Boot File

    Basically this is a question on creating a binary file using the IAR IDE that can be booted from QSPI flash. I asked IAR on how to do this since the issues are on using their IDE, however they want money (purchase a s...
    Ken Green
    last modified by Ken Green
  • TWR-VF65GS10(VF610) can't get network access in U-boot

    Hi   I am using a TWR-VF65GS10 (VF610) and have built u-boot from these two repositories:   https://github.com/u-boot/u-boot https://github.com/Freescale/u-boot-fslc.git   I build u-boot ...
    Mauricio Agurto
    last modified by Mauricio Agurto
  • Vybrid: Problem with DDR3 gate training

    Dear All,   This is a somewhat a follow up question for: Vybrid: About DDR leveling feature on DDRMC.  [1]   I've managed to run the RDLVL training (and receive results similar to expected one). Unf...
    Łukasz Majewski
    last modified by Łukasz Majewski
  • Vybrid : Setting core supply when executing SW RESET

    Dear Sir   I would like to ask about the STEPs for the SW Reset.   I refer to the following community and AN4807 Rev.0, 10/2013. https://community.nxp.com/message/522684?q=Vybrid%20SW_RST Customers ref...
    Eishi Shibusawa
    last modified by Eishi Shibusawa
  • Vybrid initialization sequence

    Dear Sir   I would like to ask about the initialization sequence of Vybrid.   Customer is executing with the following steps. 1.Clock initializaion; 2.UART initialization; 3.LPDDR iomux initialization...
    Eishi Shibusawa
    last modified by Eishi Shibusawa
  • Vybrid (vf610) QSPI HW issues

    Dear Community,   I'd like to ask for two QSPI specific issues:   1. In the current Linux kernel driver - there is a comment regarding the QSPI working in "IP Command Read" mode: Linux source code: driver...
    Łukasz Majewski
    last modified by Łukasz Majewski
  • L2 switch problem with LAN

    Hi all, I'm encountering a very strange issue with the L2_swtich on Vybrid, using linux 3.0, and i've the same problem on our custom board, phytec board and freescale twr board. All my board are in static IP.  ...
    Jeremy Esquirol
    last modified by Jeremy Esquirol
  • Vybrid (vf610) Chip Errata document

    Dear Community,   I would like to ask if there is a "Chip errata" document for Vybrid (e.g. vf610)? I'm asking since there are some issues with DMA usage with DSPI controller and also QSPI controller HW issues ...
    Łukasz Majewski
    last modified by Łukasz Majewski
  • How to perform ADC Calibration

    I'm having some trouble getting the ADC calibration to work. The description in Rev 4 of the RM refers to an "ADC_TEST" register which is not described in the interface description. Also, the expected effect of the ca...
    charliecheney
    last modified by charliecheney
  • Inter core communication

    I'm using a Vybrid processor (A5 + M4). I need to pass data from the M4 to the A5 core in DDR memory. I can't simply write to a memory space using the M4 and have the A5 read the same space because the A5 data is cach...
    Ken Green
    last modified by Ken Green
  • Manufacturing Tool U-Boot

    The manufacturing tool includes a pre-built binary "u-boot.vybrid" (stored in Profiles/Vybrid Update/OS Firmware). Using this binary, the Mfg Tool works as expected with the VF610 Tower board. However, following the b...
    Martin Bell
    last modified by Martin Bell
  • Vybrid DCU+TCON

    Hi, We are trying to use DCU+TCON (I mean NOT bypassing TCON). Our goal is to have DE inverted (which is not possible by just using DCU) There is an interesting AN: https://www.nxp.com/docs/en/application-note/...
    Leonardo Giordano
    last modified by Leonardo Giordano
  • Vybrid MFG tool issue.

    Hi I am trying to flash vybrid VF6 processor by using mfg tool on a customised board similar tp VF6 tower board through USB. When i connect it to the mfg tool it shows HID compliant vendor defined device the ucl ...
    Mohan Saini
    last modified by Mohan Saini
  • VF6xx QSPI write using eDMA

    Processor : VF6xx   Task : 1. Write external flash chip through QSPI 2. Need to transmit 512 Bytes, for one selecton of LUT sequence, so need to keep loading Tx buffer as and when the data gets pushed out of ...
    Nilesh Gujarathi
    last modified by Nilesh Gujarathi
  • VF6xx with a uSD XC 8GB

    Hello,   Is VF6xx able to access a uSD XC? I don't know if it possible to access it.   No problem with microSDHC but what happens with a 8GB microSDXC   Thank you very much
    JOSE LOPEZ
    last modified by JOSE LOPEZ
  • Temperature Delphi Model for MVF61NS151CMK50

    Hello,   Is there a Delphi model or could you please provide a Delphi model for component MVF61NS151CMK50 in order to perform a temperture simulation?   Regards,
    Juan Diaz
    last modified by Juan Diaz
  • vybrid

    My customer is using MVF61NS151CMK50, and need to caliberate DDR. I download PEx from web but have no license. I am apply license as attached but the license did not work. Is there any issue in my applying f...
    ryan shi
    last modified by ryan shi
  • License for DDRV on Driver Suite v10.4

    I have some troubles when tuning DDR3 for Vybrid. I install Driver Suite v10.4,I want to use DDRV to slove my problem,but license is needed. I Click"here" below and apply license at “ Figure 2”,...
    zhao zq
    last modified by zhao zq