• How to “invalidate” or “flush” a range of cpu cache in powerpc architecutre?

    I am working with an embedded device which communicates with my PowerPC CPU made by NXP (T1022) via PCIe. Due to the QorIQ SDK V2.0 constraints i have to use linux kernel version 4.1.8. This version doe...
    masoud.jafari@hotmail.com
    last modified by masoud.jafari@hotmail.com
  • T1042 development tools without RTOS

    I am interested in incorporating T1042 in my new design for an airborne system.In this regard,i request the end of life support for these component from your office.Please advise the Development and Debugging tools wi...
    SIVA KUMAR
    last modified by SIVA KUMAR
  • SM750 graphics on a Custom QorIQ T4240 SBC

    We have developed a custom SBC based on NXP Qoriq T4160 Processor and SM750 device connected on PCIe. I have compiled the SM750 driver  through Yocto for Linux Kernel 4.1.35 and Linux booting was successful. Af...
    Ranjithkumar v
    last modified by Ranjithkumar v
  • USDPAA order restoration does not work

    Hi, I have a TCP/UDP performance problem while using T4240RDB and SDK 2.0 linux kernel. I am using the RDB board as a router, basicly the board is routing the traffic  received from eth0 to eth1. There is one i...
    ömer faruk er
    last modified by ömer faruk er
  • T2080 VCORE controller alternative?

    The 2-phase buck controller (IR36021) recommended for the T2080 core voltage supply (and implemented in the RDB) is obsolete.   Does NXP have a recommendation for a replacement controller that supports a manual ...
    davef
    last modified by davef
  • T1024RDB eSPI driver in u-boot (fsl-espi.c)

    Hi,   Does anyone have properly fixed eSPI driver for u-boot? Original drivers/spi/fsl-espi.c provided with latest Yocto SDK (I checked 2019.03 and 2019.06) is buggy in regard of transmitting long (multi chunks)...
    Eduard Kromskoy
    last modified by Eduard Kromskoy
  • Code warrior Bring up guide for T1024

    Hello, We have designed custom hardware based on T1024 (No CPLD). Power-on sequence is per datasheet....We are getting random behavior while accessing the processor through code warrior.....Sometimes code is getting...
    gaurav verma
    last modified by gaurav verma
  • Change NOR Flash 16 bit to 32 bit to T4 Series

    Hi All,      We have a custom board built with T4 Series processor. I changed the NOR flash address from 0xE8000000 - 0xEFFFFFFF to 0xE0000000 - 0xEFFFFFFF and we connected 2 NOR Fla...
    vinothkumar s
    last modified by vinothkumar s
  • Could not connect to probe(or other debug links). CC string is invalid

    I am trying to flash my T1042RDB based custom board using Code warrior tap. When I connect my codewarrior tap to my PC, Green LED starts blinking that shows the connectivity of PC and Codewarrior tap. I am also able t...
    Ather Shehzad
    last modified by Ather Shehzad
  • How can I build usdpaa-aps ?

    Hello,   I've cloned usdpaa-aps project from git address: git://git.freescale.com/ppc/sdk/usdpaa/usdpaa-apps.git. I run "make" but there were some errors. When I look at the standalone-env file I see some enviro...
    ömer faruk er
    last modified by ömer faruk er
  • Building USDPAA applications with yocto 2.7

    My question is about how to build USDPAA applications with yocto 2.7 for t4240rdb-64b board.   I am able to build images by using latest yocto 2.7 by using the instructions from   qoriq-components/yoc...
    Sedat Altun
    last modified by Sedat Altun
  • LCD Interface with 1042RDB

    How to interface TFT LCD(LQ150X1LW71N) that is shown in reference schematic with T1042RDB? The brightness control connectors of the LCD panel are two pin connector and there is 3 pin connector on board(J16, J17) . Sim...
    Ather Shehzad
    last modified by Ather Shehzad
  • Deployment of kernel versions greater than SDK 2.0 for T4240RDB

    Hi, I need to deploy linux kernel version 4.9 or 4.14 for T4240RDB. Since the latest official kernel version is 4.1.35  published by NXP  from SDK 2.0 , I got the kernels for version gretater than 4.1.35&#...
    Sedat Altun
    last modified by Sedat Altun
  • Routing PCIe traffic between RCs (PEX)

    I've got a board with a T2080 processor on it and it is configured to use 3 PCIe ports, PEX1, PEX2, and PEX4.  Is it possible in HW (no additional SW required, except to configure registers) to route end point tr...
    Brett Wilson
    last modified by Brett Wilson
  • T2080 Linux.uImage binary

    How can I get a Linux.uImage for a T2080qds system? The image resides at flash address E8020000 and EC020000 and is approximately 7 MB. The flash there was inadvertently erased. If I can get a binary image that I can ...
    Clay Brice
    last modified by Clay Brice
  • MAC(sg.m2) configuration with SERDES 0x40 in T1022

    I am having a customised board with T1022 processor, the SERDES configuration as used through RCW in the board is 0x40. I am trying to establish connection between MAC (sg.m2) of processor with 1G/2.5G Ethernet PCS/PM...
    Hemwant Rawat
    last modified by Hemwant Rawat
  • T1024上使用tcpdump抓到的包乱序

    Hello, 我在T1024上做了一个这样应用:从一个网口收到的包从另外一个网口发出去。在测试过程中,我们发现发出去的包有乱序。我们的测试拓朴如下: PC1----->fm1-mac1---->fm1-mac2---->PC2 测试方法如下: 从PC1上发包,内核从fm1-mac1收到包之后从fm1-mac2发出去,在PC2抓fm1-mac2上发出来的包,我们发现PC2可以抓取所有从PC1上发过来的包,但...
    Aone Wan
    last modified by Aone Wan
  • How to connect SENSEVDD and  SENSEVDDC pins

    How to connect SENSEVDD and SENSEVDDC pins with T1024?what are their functions?The device don't run when these pins not connect ?I don't find solutions in the datasheet about T1024,need your help!
    fly dick
    last modified by fly dick
  • T1040 802.1x l2 switch port configuration

    I am trying to configure the l2 switch in a T1040D4RDB for 802.1x port authentication using the l2switch-cfg commands.   I have tried the "auth" command without success:    l2switch-cfg set auth ...
    Richard Bouck
    last modified by Richard Bouck
  • e6500 core:How run Little Endian with Altivec?

    I had once thought that e6500 would be set to big or little endian mode. Perhaps on a core by core basis, or perhaps everything the same. The e6500rm manual talks about memory pages being big or little endian, not the...
    Roberto Innocenti
    last modified by Roberto Innocenti