• T2080RDB-PC GPIO Access

    I'm working on a T2080RDB-PC development kit, and I need to access GPIO such that I can use an external piece of hardware to trigger interrupts in my software running on the processor. I've looked over the schematics,...
    Ian Wichmann
    last modified by Ian Wichmann
  • T2080 POWER SEQUENCING

    Hi, Is there any requirement of power sequencing in T2080 ,datasheet provides only the list of power rails?
    ANEESH KARTHIKEYAN
    last modified by ANEESH KARTHIKEYAN
  • Whether ethernet FMAN and DPAA driver will work in latest kernel 4.20 and above?

    We are using new microsemi VSC8575 phy in our T2080 custom processor board. New VSC8575 PHY chip family driver support is  only available from Linux kernel 4.20 and above. Currently SDK kernel (4.1.8) does not su...
    Karunakaran Radhakrishnan
    last modified by Karunakaran Radhakrishnan
  • how to get cpu temperature in t1042d4rdb

    Hi, I have QorIQ-sdk-V2.0-20160527-yocto and I can build Image for t1042d4rdb machine I want to get cpu temperature and monitor it in my application, but I cant find the temperature in its linux!   I have QorI...
    Mohsen SadeghiMoghaddam
    last modified by Mohsen SadeghiMoghaddam
  • PORESET_B voltage value

    Hi, I would like to control the signal PORESET_B of the T2080 with a FPGA. The supply voltage of the FPGA pin is 1V5 and the supply value for PORESET_B is 1V8. On the datasheet I just found that the recommended...
    Paula García-Moreno
    last modified by Paula García-Moreno
  • T2080 SnVDD Power Requirement

    1. Tables 6&7 of the T2080 datasheet specify SnVDD of 1.0W for all clocking scenarios. Does this figure refer to S1VDD & S2VDD combined, or 1.0W for S1VDD and 1.0W for S2VDD?   2. The T2080RDB card uses ...
    davef
    last modified by davef
  • About T1042 COP/JTAG interface connection

    Dear Responsible;   For T-series jtag connection below circuitry is recommended.  Is there any specific reason to use fictitious (theorically available but practically no) "inverted-input NOR gates" instea...
    ilhan taygurt
    last modified by ilhan taygurt
  • How to configure uboot on 2080RDB to boot a PCIe Video Card?

    We need to install debian linux for desktop on 2080RDB devkit so we need to change uboot config to boot a PCIe Video Card ( ATI) . How we can confiugure uboot?
    Roberto Innocenti
    last modified by Roberto Innocenti
  • Secure boot failed on t2080qds

    I'm working on secure boot for T2080QDS.I walked the steps,but I failed.All files come from SDK, and signed header by cst. Steps like that: set SW#6[OFF,OFF,OFF,OFF] 1.download u-boot,the file come from sdk2.0 =&g...
    Yi Li
    last modified by Yi Li
  • [T1042 Ramdisk] Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. 

    Hello NXP, I want to boot with ramdisk using commands below.   tftp 1000000 uImage--4.19-r0-t1042d4rdb-64b-20200217054545.bin tftp 2000000 t1042d4rdb--4.19-r0-t1042d4rdb-64b-20200217054545.dtb tftp 3000000 asd2...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • t2080 machine check investigation

    Hello all, My company is facing a problem with executing our highly accelerated testing of a handful of t2080 based systems. Background, we have delivered successfully a dozen or so of these systems that have all cyc...
    Matthew Dahl
    last modified by Matthew Dahl
  • [U-boot & Linux] Change location of the DDR SDRAM start adress in CPU Physical address range

    On T1042D4RDB-64B, Which variable(s) in U-boot side and DTS node in kernel side is responsible to locate DDR RAM in CPU physical memory map ?
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • Kernel Configuration in T4240RDB-64b

    Dear NXP,   I am working on T4240RDB-64B machine. I needs to add the driver kernel configuration. I am using QORIQ-SDK-2.0 source.   Which defconfig do I needs to take to enable the drive...
    vinothkumar s
    last modified by vinothkumar s
  • when accessing PCI physical address, T2080RDB hang

    When I read  PCI-0 physical address 0xf80000000(PCI-0 have no target device present) on T2080RDB(T2080E rev1.0) the CPU will hang and can not get CPU information from codeWarrior(codeWarrior report protocol&...
    Li Jun
    last modified by Li Jun
  • [ERROR] PCI memory allocation (BAR Registers) on T1042D4RDB-64B

    Hello, My problem is briefly, PCI is not allocating memory on t1042d4-64b demo board. Below is the 'dmesg' messages and U-boot messages. I will be grateful for your helps. 'dmesg' messages from...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • T2080 PVR Description

    In the T2080 Reference Manual, section 7.3.4.1 PVR mentions that the register is described in DCFG_CCSR_PVR (section 27.3.11). But the field descriptions don't match. In 7.3.4.1 it calls bits 24:27 the Processor Major...
    Scott Gerhold
    last modified by Scott Gerhold
  • Override IFC_TE strap

    I have IFC_TE strapped incorrectly for the location of the Boot flash. The board is designed to boot RCW/PBI from SPI and then load boot code from NOR flash on CS0. The NOR flash is on the fast side of the IFC subsyst...
    Scott Gerhold
    last modified by Scott Gerhold
  • T2080 VCORE controller alternative?

    The 2-phase buck controller (IR36021) recommended for the T2080 core voltage supply (and implemented in the RDB) is obsolete.   Does NXP have a recommendation for a replacement controller that supports a manual ...
    davef
    last modified by davef
  • Routing PCIe traffic between RCs (PEX)

    I've got a board with a T2080 processor on it and it is configured to use 3 PCIe ports, PEX1, PEX2, and PEX4.  Is it possible in HW (no additional SW required, except to configure registers) to route end point tr...
    Brett Wilson
    last modified by Brett Wilson
  • e6500 core:How run Little Endian with Altivec?

    I had once thought that e6500 would be set to big or little endian mode. Perhaps on a core by core basis, or perhaps everything the same. The e6500rm manual talks about memory pages being big or little endian, not the...
    Roberto Innocenti
    last modified by Roberto Innocenti