• [T1042 Ramdisk] Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. 

    Hello NXP, I want to boot with ramdisk using commands below.   tftp 1000000 uImage--4.19-r0-t1042d4rdb-64b-20200217054545.bin tftp 2000000 t1042d4rdb--4.19-r0-t1042d4rdb-64b-20200217054545.dtb tftp 3000000 asd2...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • 32-bit Physical Addressing in T1042D4RDB

    Hello,   My question is about physical addressing of T1042D4RDB. My board has 36-bit physical addressing, that means TLBs are created with 32-bit EPN and 36-bit RPN values, LAWs have 36-bit physical addressing a...
  • Displaying CPC Content

    Hello everybody,   I'm working on CCF (corenet coherency fabric) and CPC (corenet platform cache, or L3 cache) in T1042D4RDB. I studied how CCF works and uses CPC for performance about RAM I/O operations. At thi...
  • U-boot Nand booting has no Fman Ucode, how to upload FMan on NAND flash ?

    Dear NXP,   With the below commands; tftp 100000 u-boot-nand-2018.09+fslgit-r0.bin nand info nand erase 0 e67c9 nand write 100000 0 $filesize   I wrote ~921 KB U-boot NAND image to NAND flash. Then change...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • DDR Single-Bit ECC QorIQ T1040

    Section 14.4.77 in T1040 Reference Manual:   In DDR_ERR_SBE register, if SBET is set to 0, then what could be expected in SBEC field? Does it count the single-bit errors? Please advice. The register description ...
    Alex Cherniakov
    last modified by Alex Cherniakov
  • Best evaluation board for QorIQ T1022 processor?

    Hi,   We are looking at QorIQ T1022 as our potential processor and would like to know the best evaluation board for it. We will be using DDR4 RAM, Gigabit Ethernet, PCIe interfaces, etc., so the evaluation ...
  • Compilation failure linux-qoriq-rt 4.14

    Hi,   I'm working on a t1024rdb board and trying to enable linux-qoriq-rt 4.14 from the SDK. I'm using the "zeus" branch from the yocto SDK (readme - qoriq-components/yocto-sdk - Repo manifest for QorIQ Yocto SD...
    Renaud De Koninck
    last modified by Renaud De Koninck
  • T1022 Clock Sequence

    Hi,   We are designing a custom board with a T1022 processor and would like to know if the there are any power-on sequencing requirements for the clocks?   Do all power rails need to be valid before clocks a...
    Bob Russell
    last modified by Bob Russell
  • T1040RDB: ping from u-boot fails with Tx Error

    I have fused the u-boot.bin using code warrior and USB TAP onto the board.Now i am getting this error when i try to ping from u-boot     ping        ...
    Sandeep Kumar
    last modified by Sandeep Kumar
  • How to build ppc32 firmware image for T1024RDB using LSDK?

    I use a custom board based on T1024RDB. Can I create a 32-bit image (u-boot, kernel, rootfs, etc) with LSDK 19.09? I ran the following command on Ubuntu 18.04, but only flex-installer was created in ./build/image. &#...
    kenji takahashi
    last modified by kenji takahashi
  • [U-boot & Linux] Change location of the DDR SDRAM start adress in CPU Physical address range

    On T1042D4RDB-64B, Which variable(s) in U-boot side and DTS node in kernel side is responsible to locate DDR RAM in CPU physical memory map ?
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • Kernel Configuration in T4240RDB-64b

    Dear NXP,   I am working on T4240RDB-64B machine. I needs to add the driver kernel configuration. I am using QORIQ-SDK-2.0 source.   Which defconfig do I needs to take to enable the drive...
    vinothkumar s
    last modified by vinothkumar s
  • E5500 Core HID0 Register

    Hi,   I'm working on e5500 core, and have a question about HID0 representation difference between e5500 Core RM and BookE.   I'm tracking start.S file in arch/powerpc/cpu/mpc85xx directory of u-boot t...
  • [ERROR] PCI memory allocation (BAR Registers) on T1042D4RDB-64B

    Hello, My problem is briefly, PCI is not allocating memory on t1042d4-64b demo board. Below is the 'dmesg' messages and U-boot messages. I will be grateful for your helps. 'dmesg' messages from...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak
  • Need processor timings for DDR3 simulation in Hyperlynx

    HI! I am designing a custom board using T1042 processor. During the PCB designing of DDR3, i have to run some simulations on hyperlynx software using DDR batch simulation. i get all the results pass at 400 clock freq...
    Faiz Majeed
    last modified by Faiz Majeed
  • RCW Problem with T1024 new design

    We have a new design using a T1024 and are stuck.     The processor is connected to an FPGA on the IFC bus. We setup the RCW source to be 0_0010 0101, which should tell it to get the RCW from the IFC ...
    Joseph Vogl
    last modified by Joseph Vogl
  • T1040 FMAN Microcode

    Hi If i need to load the FMAN microcode to T1040RDB then i will copy the microcode from NOR flash to FMan controller Configuration Data Download Registers using the fm_upload_ucode function. The first step in the fm...
    last modified by kmanjushree@moog.com
  • Remapping NOR Flash address in T1040D4RDB UBOOT

    Hi,   I'm trying to relocate default NOR Flash mapping in T1040D4RDB Uboot from 0xe8000000 to 0xF0000000. So as per the suggestion given in one of the post in NXP community, I modified CONFIG_SYS_FLASH_BASE as 0x...
    Amarnath MB
    last modified by Amarnath MB
  • T1022 SPI Boot

    Hi,   We are working on a custom board with a T1022 processor and would like to boot from SPI flash memory.   We require 128MB of memory but the processor only supports 24-bit addressing when booting from SP...
    Bob Russell
    last modified by Bob Russell
  • Compiling uImage with all linux modules

    Hello, I am trying to compile a new kernel obtained from GitHub - qoriq-open-source/linux (version 4.9) for t1042d4rdb-64b. using Yocto. I followed the steps;   1) bitbake virtual/kernel -c cleansstate 2) bit...
    Yusuf Altıparmak
    last modified by Yusuf Altıparmak