• i.MXRT1062 - serial download not working

    Dears,    I have programmed a wrong setting into SDRAM peripheral registers and it caused a crash. ( not hardfault ? )    The problem is I can not access the chip over debug port and also over th...
    Taylan Mucuk
    last modified by Taylan Mucuk
  • 用的1050套件提供的wmwin demo编译报错问题

    flexspi_nor_sdram_debug\emwin_gui_demo.out: Error: L6218E: Undefined symbol Image$$RW_m_config_text$$Base (referred from fsl_flexspi_nor_boot.o). 这个问题是怎么造成的,需要怎么修改呢,谢谢
    Op Fancy
    last modified by Op Fancy
  • rt1021caf4a error in final launch sequence

    IMXRT1021CAF4A仿真器死活连不上大概是什么原因?仿真器用的是JLINK,XpressoIDE版本是10.3.1 2233。 芯片供电电压,内核1.1电压都正常。 这是JTAG/SWD部分的电路图。 其中,JTRST信号也就到POR口了,如下图: 不知原理部分是由问题吗?我采用SWD方式连接。 工程设置如下:   startup配置: 提示错误信息:
    yi wan
    last modified by yi wan
  • RT1062 JTAG Debugging

    Hello all. We are having some issues connecting to the RT1062 in JTAG mode using a J-Link Plus. We are seeing this both in our custom hardware and on the NXP MIMXRT1060-EVK development board.   For our custom ha...
    Mike DeKoker
    last modified by Mike DeKoker
  • RT1050 LPSPI last bit not completing in continuous mode

    TL;DR - On the RT1050 LPSPI peripheral, when continuous mode is active (TCR.CONT == 1), the last SCK edge of a transfer does not complete, which means the last byte does not arrive in the RX FIFO, which means that whe...
    David Rodgers
    last modified by David Rodgers
  • DSB macro usage in ENET_DriverIRQHandler()

    In ENET_DriverIRQHandler() the DSB fix for ARM errata 838869 appears twice in a row.   I have two questions:   1) Why is this Data Synchronisation Barrier required twice in succession ? ...
    Simon Walke
    last modified by Simon Walke
  • iMXRT1064 Bootloader

    Hi, I am developing a bootloader for iMXRT1064 to update the firmware in the inbuilt flash (interfaced through FLEXSPI2). As per my understanding, the bootloader in the bootrom section can be used to perform flash op...
    hemadri payam
    last modified by hemadri payam
  • GPIO Interrupt Newbie Question

    Hi Gents,  New to interrupts on the iMXRT. How does one register a GPIO interrupt handler (say as you use to do with registerHandlerGPIO(x,y, my_handler) )?  There are the double-weak functions...  So ...
    Mike Spenard
    last modified by Mike Spenard
  • SDK2.3.0 FatFs sample for MIMXRT1050-EVK does not work

    Hi all,   I tried FatFS sample in SDK_2.3.0 for EVK-MIMXRT1050.   Console said: FATFS example to demonstrate how to use FATFS with SD card. Please insert a card into board. Card inserted. Then pro...
    Takeshi Masumoto
    last modified by Takeshi Masumoto
  • CAN on i.MX RT1064 EVK

    Hi,   According to the MIMXRT1064 EVK Board Hardware User's Guide Figure 1, it is said that the EVK contained 1 CAN module. However, Figure 2 does not show any CAN module.  As I have purchased the EVK, doe...
    KLINSMANN MAH
    last modified by KLINSMANN MAH
  • Max current sink on iMXRT1021 GPIO pins

    Hi All,  I need to know the maximum current you can 'sink' through the GPIO pins on the iMXRT1021. It is not in any of the datasheets. I need to know per-pin and total currents. (We have a group of LED's whic...
    Chris Cowdery
    last modified by Chris Cowdery
  • RT1064 programming the internal Flash at the same time as using HyperRAM

    I have come to a tiresome problem in one of our projects.  The system uses a RT1064, HyperRAM (8 Mbyte) and the code runs out of the internal 4 MByte Flash in the 1064. The HyperRAM is connected to FlexSPI and ...
    Carsten Groen
    last modified by Carsten Groen
  • LCD frame buffer in HyperRAM

    Hi, I am using my own design with IMXRT1062. I have connected S70KS1281 hyperram chip to FLEXSPI2 interface. All initialization of hyperram is based on AN12239SW example project.   Hyperram is working, I am abl...
    Peter Janco
    last modified by Peter Janco
  • Cache handling on the iMXRT-Family

    Hello,   NXP has altered the CMSIS-Sources (from here https://github.com/ARM-software/CMSIS_5) and added an extra “register”-qualifier (see below-left the NXP Version – below-right, the one fro...
    Masmiseim
    last modified by Masmiseim
  • imxrt1064 camera csi565 example

    I am running the example code for imxrt1064 camera csi565 example. I am using the MT9M114 camera and wanted to use RGB888 instead of the RGB565 format in the example. I have changed the pixelFormat to RGB888...
    Xingsheng Wang
    last modified by Xingsheng Wang
  • How to config the IMXRT1052 SRAM WAIT/RDY# pin

    Hello everyone, i meet a emergence issue in our design. please, find someone to resolve this problem. Look at 1050 user guide section SEMC controller, below the picture: the MCR register bit[6] can change N...
    钱汉望 钱
    last modified by 钱汉望 钱
  • Initiating SPI transfer with GPIO and moving data without CPU involvement.

    I'm working with an i.MX RT1020 processor connected to an external SPI device. This external device contains a "data ready" pin which can be used as an input to the processor. I would like to use this pulse as a trigg...
    Logan Witter
    last modified by Logan Witter
  • i.MXRT Serial Downloader USB HID Enumeration Failed

    Hi, We're using i.MXRT1051 in our project. Because of boot source some fuses needed to be burned. Those are: - BT_FUSE_SEL @0x06 - eMMC_BOOT @ 0x05 - eUSDHC_BOOT @ 0x05 - Default_FlexRAM_Part (1011) @ 0x2D - 448K...
    Lukasz Skrzypczak
    last modified by Lukasz Skrzypczak
  • About NXP-MCUBootUtility

    Hello,    I have question about NXP-MCUBootUtility for i.MX-RT. This is really nice tool we can use to flash an external SPI NOR flash via i.MX-RT. But does NXP have any written license agreement or discl...
    Norihiro Michigami
    last modified by Norihiro Michigami
  • iMXRT1052 and emWin: problems with D cache

    Hi,   I was trying to build a GUI using the emWin library on the iMXRT1052 microcontroller and I encountered a performance problem. As far as I know, the LCD and GUI buffers should be placed in a non-cacheable r...
    Krzysztof Chojnowski
    last modified by Krzysztof Chojnowski