• i.MX 8M Nano - Enable .NET Core on Yocto Linux

    Hello team,   I have customers how are trying to Enable .NET Core on Yocto Linux. .NET core it's a runtime for C# programs, mainly works on Debian Distribute, please refer to Install .NET Core an...
    Shai Berman
    last modified by Shai Berman
  • Installing PyEIQ on i.MX 8QuadPlus MEK

    Hello I would like to install PyEIQ on my i.MX 8QuadPlus MEK eval kit. My Eval board is BO. I installed demo BSP version L5.4.24_2.1.0_MX8QXPB0. The BSP package has "imx-image-multimedia-imx8qxpmek.wic". I created a ...
    sivashankar yoganathan
    last modified by sivashankar yoganathan
  • i.MX 8M Mini, DDR memory map

    Hi,   In section 2.1.2 (A-53) and Section 2.1.3 (M-4) of the "i.MX 8M Mini Applications Processor Reference Manual" documents the chip memory map. I have a couple of questions:   1) Can you confirm ...
    Said Jazouly
    last modified by Said Jazouly
  • i.MX 8 Camera Use Cases

    This document describes all the i.MX 8 MIPI-CSI use cases, showing the available cameras and daughter cards supported by the boards, the compatible Device Trees (DTS) files, and how to enable these different camera op...
    Marco Antonio Franchi
    last modified by Marco Antonio Franchi
  • i.MX 8M Nano DDR Tool

    I am working with a custom designed board that utilizes either the i.MX 8M Mini or i.MX 8M Nano processor with LPDDR4 (x32 or x16 per processor support).  Our last build of boards included I-Temp rated processor ...
    Nathan Kro
    last modified by Nathan Kro
  • RPMSG buffer not cleared after M4 firmware reload

    Hello, I am using rpmsg to communicate between a linux (A53) and a FreeRTOS (M4) on an imx8 through a rpsmg driver based on imx_rpmsg_tty.c. M4 implementation is based on example rpmsg_lite_str_echo_rtos_imxcm4 with ...
    olivier RIFF
    last modified by olivier RIFF
  • FlexSPI layout guidelines

    HI NXP Team,   We are using i.MX8DualXPLUS processor in our custom platform development based on the MEK. Please recommend some good reference document/link for the FlexSPI Octal interface layout guidelines. 
    Harsh Mistry
    last modified by Harsh Mistry
  • CSI0 with 16-Bit video does not receive any frame

    We have some issues with our Board trying to receive a 16-Bit video Stream (YUYV with external HSync and VSync) with 1080p25 resolution from an external SOC connected to CSI0 of IPU1 of our iMX6DL (Pixel Clock ~ 78MHz...
    Sebastian Wendt
    last modified by Sebastian Wendt
  • Yocto zeus - cannot apply patch in u-boot (imx7ulp-evk)

    Hi everyone,   I currently made the update from sumo to the latest zeus (5.4.24_2.1.0)  and I have some issues. In my custom meta-layer I have a patch that was applying ok in ...
    Liviu Ene
    last modified by Liviu Ene
  • Ethernet Communication over longer cable length

    Hi NXP Team,   We are designing a product on i.MX8M Mini processor and Ethernet signals are used for VoIP calling and we have implemented Microchip PHY- KSZ9031.   We are trying to check the communication...
    Dhara Pillai
    last modified by Dhara Pillai
  • How to add rpmsg wakeup in android 9 automotive

    Hi All,   I build android image for android 9 automotive with EVS function enabled for IMX8QM MEK platform.   I implement the following configuration for RPMSG wakeup. but, not able to wake the A53.  ...
    vinothkumar s
    created by vinothkumar s
  • GPIO1_IO07 Reset condition

    Hi everyone,   I need some information about the reset condition of a certain pin. The i.MX8M Nano datasheet lists reset condition in table 65.   For GPIO1_IO07 it lists “Input with PU” after...
    Johannes Urban
    created by Johannes Urban
  • Treck TCP/IP

    Hi,           Recently, there has been a vulnerability issue in the Treck TCP/IP protocol library. Will the NXP i.MX8MM I use, the officially improved demo image and the cross-compilation cha...
    扬 杨
    last modified by 扬 杨
  • i.MX GPIO PU/PD/keeper admittable configurations

    Hi all,   I wrote this question to try to summarize things on official documentation and to get an explanation about the topic GPIO PU/PD/keeper admittable configurations, for GPIO output and input configuration...
    Mauro Salvini
    last modified by Mauro Salvini
  • How to enable temperature monitoring in IMX7D?

    Hello,   I just want to check how to enable temp monitoring in imx7d? I have a custom im7d board and I cant seem to find where to enable temp monitoring in /sys/class/thermal   In my menuconfig, I can con...
    Javer Valino
    last modified by Javer Valino
  • Can I use opencl in i.mx8m mini?

    Hello. I am a beginner with i.mx8m mini. I am woking with variscite's var-imx8mm-dart evm board(with i.mx8m mini). I want to use opencv with opencl. but, the opencl sample code is not working. the sample executable...
    Jaechul Cho
    last modified by Jaechul Cho
  • i.MX6 SoloX Processor Top Marking

    Where I can find the Part marking details for following parts?   I am not able to find details in the datasheet.   MCIMX6X4CVM08AC MMPF0200F6AEP   Thanks & Regards, Muneeswaran R
    Muneeswaran R
    last modified by Muneeswaran R
  • run screenrecord success, but color is wrong

    Hi,  I tried to use screenrecord command, it run success, but the colors are wrong while playing it. Is this about the color-format?,    I dump the supported color format of codec OMX.Freescale.std.v...
    Scott Chung
    last modified by Scott Chung
  • iMX8QM LPDDR4 RPA Support ROW_Addresses == 17 ?

       I have a problem with a customized iMX8QM  LPDDR4 ( 2 x 4GiB ) memory.        The table below shows memory device configuration. 16Gb per channel,1 Rank per channel . ...
    He Xiaotao
    last modified by He Xiaotao
  • About SD Card Power Down

    Hello,Community   As shown below, at power down, CLK, CMD and DATA must be logic 0. For example, if you use SW_MUX_CTL_Register(IOMUXC_SW_MUX_CTL_PAD_SD1_CLK) for ALT0_SD1_CLK and use it as a clock, do you have...
    goto11@wantsinc.jp
    last modified by goto11@wantsinc.jp