• Sample code for iMX6 SabreSD to use MIPI CSI camera with virtual channel 3

    It is based on 3.0.35 GA 4.1.0 BSP.   0001-Correct-mipi-camera-virtual-channel-setting-in-ipu_c.patch It is the updated IPU code for MIPI ID and SMFC setting in ipu_capture.c. These setting should not be combin...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • Early console patch for iMX 3.1x kernel to print debug messages from debug UART port

    From iMX 3.1x kernel, all kernel debug messages will be print to debug serial port after UART driver loaded, so if the kernel hang up before tty console driver ready, there will be no kernel boot up messages.   ...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • iMX6 camera patch to support CSI->VDI->IC->MEM and CSI->VDI->MEM capture

    The patches are based on iMX6 L3.10.53 and 3.14.52 GA BSP.   In default linux BSP, the followed two pathes were supported in kernel driver mxc_v4l2_capture.c: CSI->IC->MEM CSI->MEM   After appied ...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • ov7670 camera on imx6ul

    Hi everyone,             Greetings of the day...   kernel version: 4.9          I m interfacing the ov76...
    Ganesh Koda
    last modified by Ganesh Koda
  • iMX6 VDI 60fps de-interlace improvement example

    It is based on L3.0.35_GA4.1.0 BSP.   In default Linux BSP, there are 3 kinds of de-interlace mode, motion =0,1,2 mode, motion mode 0 and 1 will use three fields for de-interlace, and motion mode 2 wil use one f...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • SIGSEGV problem when gstreamer pipeline starts to run with glimagesink

    Hello Team,    This is regarding the current project named Toyota CY20 based on i.MX6Dual.  This is based on L4.14.98-2.0.0_ga.  Here we have configured the following gstreamer components in...
    Ikshwaku Chauhan
    last modified by Ikshwaku Chauhan
  • QT Video display - VPU iram is less than needed

    Hi   I am trying to display some video with qt application in HDMI display. while running the video is slow and got the error message. Device chip IMX6DL and PICO board.   [WARN] VPU iram is less than need...
    Arunkumar V
    last modified by Arunkumar V
  • USB_H1_PWR control

    Moving to new thread:   Hi Igor,   From RM:   - We are configuring EIM_D31 pad as USB_H1_PWR function. - EIM_D31 pad is connecting to enable pad of power IC for cutting VBUS supply. - When iM...
    Kazuma Sasaki
    last modified by Kazuma Sasaki
  • USB over-current detection

    Hi,   In our products, we are using over-current detection to control Vbus supply using USB_H1_PWR pin. When iMX6DL detect USB over-current event via USB_H1_OC pin, iMX6DL assert a USB_H1_PWR ...
    Kazuma Sasaki
    last modified by Kazuma Sasaki
  • Booting from NAND 4.14.98_2.2.0 imx6ull

    Hi,   We are porting our imx6ull from 4.1.15 to 4.14.98(provided by NXP). Uboot and kernel are successfully up. But filesystem mounting is not happening   UBI error: cannot open mtd 3, error -19 snvs_rtc 2...
    Deepanraj Anbarasan
    last modified by Deepanraj Anbarasan
  • iMX6 memory copy

    Hello. I'm using iMX Platform SDK for my i.MX6 DualLite processor. I'm trying to copy a large amounts of data from ethernet buffer to another. For this purpose I'm trying to use MMU with L1 cache.But I have a proble...
    Vadim Ignatov
    last modified by Vadim Ignatov
  • Patch to support uboot logo keep from uboot to kernel for NXP Linux and Android BSP (HDMI, LCD and LVDS)

    This patch made the display no interrupt from uboot to kernel to Android. The IPU and related hardware display interface will only be initialized once in Uboot, the kernel code will skip the IPU initialization.  ...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • Short straight lines appear on Qt5 APP (i.MX6Quad SABRE kit)

    Hi everyone,   I am developing i.MX6 product. When I checked Qt5 APP by using SABRE kit, there was short straight lines. Could you help me?    Yocto version : Warrior Kernel version : L4.19.35 &...
    Coiln Park
    last modified by Coiln Park
  • Qt app freezes when touch screen after a time

    Hello, I have a big problem with a qt app. The qt version is 5.9, build It in qt creator 4.2.1 and cross-compiler to an Imx6 Linux board. The Imx6 was built with Yocto 2.4.  My qt app is a big project, has spi...
    emmanuel perea
    last modified by emmanuel perea
  • uboot bootloader in secure mode

    Dear NXP team, We want to know whether the uboot  is in secure world mode? where uboot can access registers/Keys which can be accessed only from the secure world? If not whether we can cofigure uboot for accessi...
    Shyju Thekkumbadan
    last modified by Shyju Thekkumbadan
  • How to disable data particular host port on a hub ?

    I have two usb port in hub attached to my carrier board.I am able to disable the power line like  this echo 0 > /sys/class/gpio/gpio5/value .But disabling just power line does not solve the problem since exter...
    sumit kumar
    last modified by sumit kumar
  • DDR3 configuration for iMX6DL

    Hi, I'm developing SW for a device containing iMX6DL processor. We are planning to replace the current SDRAM to a bigger one. I have downloaded the DDR3 configuration aid tool, i.e. MX6DL_SabreSD_DDR3_register_progra...
    Jari Peltonen
    last modified by Jari Peltonen
  • How to configure IMX6-DQ  MIPI DSI Generic FIFOs size?

    APB to Generic block bridges APB operations into FIFOs holding the Generic commands. The block interfaces with 3 FIFOS, a command FIFO, a write payload FIFO and a read payload FIFO.   How to configure wri...
    Lee Shuai
    last modified by Lee Shuai
  • How to set boot count for iMX.6 Dual and Dual lite?

    Hello All NXP Users,   I want to set boot count to 5 for iMX.6. I am using both Dual and Dual lite modules.   U-boot source code reference: Freescale's U-Boot 2014.04. As I checked,...
    Pratik Rajyaguru
    last modified by Pratik Rajyaguru
  • [i.MX6DL] ERR004489: detailed description of RX_EQ[2:0]

    I cannot find detailed description of RX_EQ[2:0] bits in RX_OVRD_IN_HI register in neither chip errata nor reference manual.  I think RX_OVRD_IN_HI[RX_EQ_OVRD] enables overriding PCIe2 Rx equalizer setting by RX_...
    last modified by yutaka_ando