• Patch to support adv7180 TVin chip for Freescale Android R10.4 BSP on iMX53 -blog archive

        Freescale Android BSP doesn't support TVin chips, this patch enabled the adv7180 chip for Android.     The followed functions are supported:     1) Android camera app...
    Qiang Li - Mpu Se
    last modified by Qiang Li - Mpu Se
  • runqemu imx8mmevk not working

    i build the yocto image for hardware imx8mmevk by following steps 1)Downloaded meta-freescale-thud bsp and added at poky_thud directory and mentioned layed in bblayer.conf 2)changed machine at local.conf to imx8mmev...
    Omkar Teli
    last modified by Omkar Teli
  • spi first time op error in imx6ull with kernel 4.19.35

    hardware: imx6ull kernel: kernel 4.19.35 in custom board, i use ecspi1 controller two devices,  dts as follow: ecspi1 {    fsl,spi-num-chipselects = <2>;    cs-gpios = <...
    he lun
    last modified by he lun
  • i.MX51 WINCE600 eCSPI Support Multiple Bursts Mode and Wait States

    In the i.MX51 default WINCE6  release, the eCSPI doesn't support multiple bursts mode and set the wait states. Attached was the document and code for how to enable the multiple bursts mode and how to set the wai...
    Justin Jiang
    last modified by Adrian Puga Candelario
  • How to enable SSI1 double FIFO on i.MX51 WINCE600

    In the default release the SSI1 doesn't suport double FIFO in audio driver. Attached was the code to support double FIFO with updated DMA script.
    Justin Jiang
    last modified by Adrian Puga Candelario
  • iMX53 camera patch to support CSI->VDI->IC->MEM capture

    The patches are based on iMX53 L2.6.35_ER1109 BSP.   In default linux BSP, the followed two pathes were supported in kernel driver mxc_v4l2_capture.c: CSI->IC->MEM CSI->MEM   After appied these ...
    Qiang Li - Mpu Se
    last modified by Adrian Puga Candelario
  • Handling Heap/Stack - Sample application RT1050

    Dear friends,   In developing of a project with i.MXRT1052, I are having difficulty testing the handling of Heap / Stack regions so that the program runs on external RAM (64Mb) rather than internal RAM (96kb). P...
    Rubens Junior
    last modified by Rubens Junior
  • QSPI Flash RT1050 failure

    Dear,   I'm working on a project with the NXP i.MXRT1050 family MIMXRT1052DVL6B processor. For preliminary testing I'm using the MIMXRT1050-EVK development kit. For the initial tests we are using the SDX provide...
    Rubens Junior
    last modified by Rubens Junior
  • LOCSC Interface

    Dear collegues! Happy 2020!   Does anyone know of an interface called locsc for NXP processors?   Best regards. Rubens Júnior.
    Rubens Junior
    last modified by Rubens Junior
  • LOCSC Interface

    Dear collegues! Happy 2020!   Does anyone know of an interface called locsc for NXP processors?   Best regards. Rubens Júnior.
    Rubens Junior
    last modified by Rubens Junior
  • Fixed chip ID reporting in FXOS8700 driver

    Fixed bug in FXOS8700 driver where chip ID would always be reported as 0x0 in an error message when chip id read fails or returns unexpected value during FXOS87000 initialization.
    venkata shuressh
    last modified by venkata shuressh

    Hello Every one, Good morning to all   I am using a sgtl5000 in my console mixer project, I have interfacing through spi , Also I have set all the registers of sgtl5000 , but it doesn't respond any thing.  ...
    vikash chandra raman
    last modified by vikash chandra raman
  • a simple task fails for TCM_L and works well  for flash.

    hello Maybe it is an obvious question but i do not see correct answer. i use mx6sx mcu (a9 and m4 cores inside) and had created a FreeRTOS little test project for TCM_L memory of m4. The project has one little task -...
    oleg scherbinin
    last modified by oleg scherbinin
  • iMX51 and boundary scan

    When connected via JTAG, 3 devices are detected. Using TOPJTAG! Two devices are known - the i MX51 chip itself and the core! The third device is identified with ID=0, most likely it is SDMA! IR length?
    Sergei Molotkov
    last modified by Sergei Molotkov
  • PCIe: Virtual channels

    Hey all,   I need to know which NXP MCUs/MPUs supports more then one Virtual Channel (VC) for PCIe.   I need to realize isochronous data transfers over PCIe.   Thanks in advance!
    Julian Dietrich
    last modified by Julian Dietrich
  • Opencv - based image acquisition, qt display

    Opencv - based image acquisition, qt display Everybody is good Imax6q board, qt creator of 5.9.5, kernel 4.1.15   I collect the camera of v4l2 with opencv and display it with the label of qt.Currently it can be ...
    袁 野
    created by 袁 野
  • U Boot how to make SPI Flash configuration

    Hi guys,   I'm working on i.MX6UL custom board. Trying to configure SPI Flash (Model = Winbond W25Q128JV), Here's the changes that I've made and the parts that I've added; ## arch/arm/dts/imx6ul-14x14-evk.dts; ...
    berkay ercan
    last modified by berkay ercan
  • HID detection issue

    I have been facing HID Detection issues. Few boards get detected. Whereas the detecting boards are found to have the same issue sometimes. There are no hardware changes that can be differentiated between detecting and...
    Annie Varshitha
    last modified by Annie Varshitha
  • How to switch EIM control pin to GPIO mode?

    Hello everyone!       Now I can use EIM and FPGA communication in normal use of imx6sx. the bsp is 4.14.98.CS pin and other control pins are used in EIM.       As the pins are relatively...
    long hao
    last modified by long hao
  • IMX6 CSI Register Settings on Linux

    Hi   How can i see the csi registers in linux command line? If i need to update any kernel or u-boot code is ok for me.   I just want to see    IPU_CSI_SENS_FRM_SIZE IPU_CSI_ACT_FRM_SIZE IOMUX...
    ümit kayacık
    last modified by ümit kayacık