• Will using a 16-bit external bus be too slow for LCD, causing tearing to occur?

    Not necessarily, it really depends on the LCD resolution, clock rate, etc. Using a 16-bit interface will have more of a chance for tearing and won't be able to handle as big a display as a 32-bit interface.
    LPCware Support
    last modified by LPCware Support
  • Is there dedicated on-board SRAM memory specifically for the frame buffer?

    The internal RAM is not dedicated for video memory. All memory - external or internal - can be shared with the LCD controller.
    LPCware Support
    last modified by LPCware Support
  • Is the LCD DMA located in the LCD macrocell or the GP DMA ?

    The LCD controller is it's own bus master and isn't part of the GP DMA module. DMA operation for the LCD controller is pretty much transparent - all you need to do is setup the LCD controller and point the frame buffe...
    LPCware Support
    last modified by LPCware Support
  • Are the LCD controller signals LVDS?

    The signals are not LVDS. You'll need a converter if you are using a display with an LVDS interface.
    LPCware Support
    last modified by LPCware Support
  • Is the LCD DMA a gather scatter DMA ? Where is it located exactly ?

    The LCD DMA keeps the LCD FIFO full. It can only DMA from the LCD framebuffer which must be a contiguous block of memory. Scatter-gather support isn't provided, but due to the nature of how the frame buffer must be ar...
    LPCware Support
    last modified by LPCware Support
  • How to calculate the value of crystal load capacitors?

    The following formula may be used to calculate a parallel resonant crystal's external load capacitors: CL = ((CX1 x CX2) / (CX1 + CX2)) + Cstray where: CL = the crystal load capacitance Cstray = the stray capacitance ...
    LPCware Support
    last modified by LPCware Support
  • If the LCD controller has a lower priority on the EMC bus, refreshes will be stalled. How noticable is this on the screen?

    If it happens, a DMA underflow will occur causing a tear. For the frame being rendered when this happens, the data under the spot of the display where the tear happen will be misaligned. Because the frame is being upd...
    LPCware Support
    last modified by LPCware Support
  • After a software reset like WD reset, BOD reset, is the SRAM content retained?

    Yes. In case of a software reset like WD reset, BOD reset etc, the SRAM contents (memory address 0x1000 0000 to 0x1000 2000 in case of LPC1227 ) is retained. However, the part won't retain the contents if it goes to d...
    LPCware Support
    last modified by LPCware Support
  • Do you have size limit or memory size calculator to help set the size of the frame buffer?

    The size limit for the LCD frame buffer is 1024x1024x4, which would be a 1k x 1k x 24bpp display. You can compute a frame buffers memory requirements by multiplying the X resolution by the Y resolution by the color de...
    LPCware Support
    last modified by LPCware Support