Log in to follow, share, and participate in this community. NXP currently does not have a G.729 codec implemented for the NXP Cortex-M3 microcontrollers. At this time, the LPC17xx and LPC18xx family of microcontrollers do not have a USB flash loader. The IO pin will be 5V tolerant if the supply voltage Vdd is present, and they are configured as inputs. VDDIO must be applied to the microcontroller when input voltage is 5V, or else the 5V tolerance does not apply. &... Not necessarily, it really depends on the LCD resolution, clock rate, etc. Using a 16-bit interface will have more of a chance for tearing and won't be able to handle as big a display as a 32-bit interface. The internal RAM is not dedicated for video memory. All memory - external or internal - can be shared with the LCD controller. The LCD controller is it's own bus master and isn't part of the GP DMA module. DMA operation for the LCD controller is pretty much transparent - all you need to do is setup the LCD controller and point the frame buffe... The signals are not LVDS. You'll need a converter if you are using a display with an LVDS interface. The LCD DMA keeps the LCD FIFO full. It can only DMA from the LCD framebuffer which must be a contiguous block of memory. Scatter-gather support isn't provided, but due to the nature of how the frame buffer must be ar... The LPC13xx and LPC17xx families have a single ADC and sample-and-hold, so sampling multiple signals at the same time is not possible, unless an external sample-and-hold circuit is utilized. The LPC18xx microcontroll... CPU Core Revision Background The CPU core revision level is identified in the System Control Block (SCB) by the CPUID register found at address 0xE000ED00. Further information can be found in ARMR... To place code in RAM, follow the link here: http://support.code-red-tech.com/CodeRedWiki/CodeInRam Yes, you can download AN10913: DSP library for LPC1300, LPC1700 and LPC1800 from http://www.nxp.com/documents/application_note/AN10913_CM3_DSP_library_v1_0_0.zip The following formula may be used to calculate a parallel resonant crystal's external load capacitors: CL = ((CX1 x CX2) / (CX1 + CX2)) + Cstray where: CL = the crystal load capacitance Cstray = the stray capacitance ... If it happens, a DMA underflow will occur causing a tear. For the frame being rendered when this happens, the data under the spot of the display where the tear happen will be misaligned. Because the frame is being upd... Sorry, there is no specific code in the LPC18xx PDL. However, a SPI driver example is there as a starting point. Yes. In case of a software reset like WD reset, BOD reset etc, the SRAM contents (memory address 0x1000 0000 to 0x1000 2000 in case of LPC1227 ) is retained. However, the part won't retain the contents if it goes to d... NXP currently does not have a G.729 codec implemented for the NXP Cortex-M3 microcontrollers. The size limit for the LCD frame buffer is 1024x1024x4, which would be a 1k x 1k x 24bpp display. You can compute a frame buffers memory requirements by multiplying the X resolution by the Y resolution by the color de... The LPCXpresso IDE is available for Windows, Linux and Mac OS X hosts. LPCXpresso can be downloaded from here.