• In FS6500 SBC, need to close S1 switch while releasing FSxB pins?

    The S1 switch between VPU_FS pin & Vpre shall be closed under which circumstances while releasing FSxB pins? As seen in the diagram of FS1B activation, switch S1 when closed, connects the Vpre & VPU_FS.  ...
    Vaibhav Sharma
    last modified by Vaibhav Sharma
  • FS4503 Grounding

    Hello! Please help us clarify the following questions 1. Witch pin the return path of GATE_LS?(AGND or DGND) 2. GND of S32K144 is no distinction between digital and analog (No DGND,AGND, Only Vss), How do...
    Wade Liu
    last modified by Wade Liu
  • MC33FS6523CAE

    Hi , I need  the reference manual and power consumption for MC33FS6523CAE. It will be better if you could share the power consumption sheet. currently my activity is to test the power rails of board  so I...
    neha jagtap
    last modified by neha jagtap
  • FS6513 Vpre voltage dies down after 8 secs on start

    I am using FS6513 with an input of 24V. Only portion upto Vpre is populated. The Vcore portion is disconnected. Every Time the power supply is turned on the Voltage on Vpre rises upto 6.5V but dies down to zero exactl...
    Rajesh Sura
    last modified by Rajesh Sura
  • How to verify LPOFF_Auto_WU worked?

    Hi,    When I using SBC FS4500, I try to verify whether the state machine swich of NORMAL MODE ->LPOFF-Auto WU->Wake-up is really worked. When in Normal mode, I sent spi by writing Mode register...
    新光 王
    last modified by 新光 王
  • How to start up the FS4500 SBC

    Hi,all When I power on the FS4500 ,It only lasts 1.3s then shuts down . Our team can only use it's debug mode now. I write three instructions. first I use DSPI to config the  INIT_INT register to let FS4500 in ...
    liu jiahua
    last modified by liu jiahua
  • FS65 FMEDA questions

    Hi,   There are some urgent questions from our customer ALPS, regarding FS65 FMEDA. Will appreciate if these can be answer by 25th Oct!!   1, In FS65 FMEDA Safety Mechanisms sheet, SM8 is set in Low ...
    Murong Li
    created by Murong Li
  • Will it make the S32K damage if using debuger reprogram when reset always occurs

    Hi, All During the time I test the fucntion of SBC(FS4500)and S32K144, before I disconnected the reset pin of SBC and MCU to debug. When I recover the connected of the reset pin of SBC and MCU, use debuger to reprogr...
    新光 王
    last modified by 新光 王
  • How to bypass the impact of VCORE_FB_UV, VAUX_UV and VCCA_UV when using SBC4500

    Hi, when I using FS4500CAE chip to manage S32K144 power fault, I encountered some questions as below. This has three errors which is VCORE_FB_UV, VAUX_UV and VCCA_UV. Due to these errors, the RSTB and FS0B ...
    新光 王
    last modified by 新光 王
  • There no response when using S32K communicate with FS4500 by SPI

    Hi,  When I using S32K to communicate with FS4500 by SPI, there no any response to know whether the SPI is built. I use oscilloscope can watch the signals such as CLK, MOSI, PCS are OK. So I just want to know ho...
    新光 王
    last modified by 新光 王
  • Pause FS6500 watchdog

    As the title say, because of the flash erase operation, we need to pause the watchdog in FS6500; but this mode only can set in INIT phase.What can i do?
    yang yang
    last modified by yang yang
  • Unable to generate interrupt from SBC!

    Hi,   SBC- FS6513C: How to generate a test case to check the working of interrupt? I've tried to reduce the power supply down to 2V which should fulfill the 1st category depicted below.   Have tried other ...
    Vaibhav Sharma
    last modified by Vaibhav Sharma
  • sbc4500 watchdog refresh doesnt work properly

    Hey, I need some help with  the sbc4500 watchdog refresh. The window size is 128ms and all 100ms i am sending a seed to refresh. From this refresh i calculate the response and send it back to sbc. After a succe...
    Thorben Kamp
    last modified by Thorben Kamp
  • Visit us next week at NXP Connects 2019 Silcon Valley, June 12-13 in Santa Clara

    NXP Connects 2019 Silicon Valley   Visit us next week at NXP Connects 2019 Silcon Valley, June 12-13 in Santa Clara   We will run three sessions dedicated to our Safety PMIC solutions : Wednesday 3PM : ...
  • Nxp FS4500 SBC chip interface with Nxp S32K148 issue

    Hello I am trying to interface with NxP SBC FS4500 chip through a NxP S32K148 Micro-controller. Each time during the initialization, I receive 7F FF FF FF FF .... for punch of frames. I tried to change the data to ...
    Ahmed GadAllah
    last modified by Ahmed GadAllah
  • In FS6513, FLT_ERR_2:0 is showing Max value(6) at Init

    The FLT_ERR_2:0 bits is showing 6(FEC is configured for threshold 6) at the start of the SBC_Init function(before any of the other command being sent). So presently after initializing SPI & port drivers, SBC is be...
    Vaibhav Sharma
    last modified by Vaibhav Sharma
  • 35FS6500 Reset Reason

    Hi all,   I saw on product's datasheet that there are a lot of reasons which could cause an SBC reset via RSTB route. That's fine, but I need to know, most generically, if the reset was due to RSTB or POR. How c...
    Daniele Spinello
    last modified by Daniele Spinello
  • BAT_FAIL bit is always 0(Wakeup from LPOFF)

    BAT_FAIL bit in INIT_VREG register is always 0(Even on reset), which shows that the POR never occurred. I am using debug mode. The RSTB_EXT bit in DIAG_SF_IOs register is 1 every time, I run the code.   Q1. Why ...
    Vaibhav Sharma
    last modified by Vaibhav Sharma
  • FS45&65 IC socket for HLQFP48

    Hi NXP technical team. We're looking for IC-socket to choose the precise for FS65/45.  Do you have a recommended IC-socket for it? The target package name is "SOT1571-1: HLQFP48". Would you please advice to cl...
    Yuki Sato
    last modified by Yuki Sato
  • In FS6500 SBC, what happens if MCU fails to service watchdog in the 1st 256ms refresh period?

    As to switch from INIT_FS mode to Normal_WD mode in SBC, 1 good watchdog refresh is essential by MCU; but if the MCU fails to do so in 256msec, then RSTB, FS0B & FS1B(after Tdelay time) are asserted low. So at thi...
    Vaibhav Sharma
    last modified by Vaibhav Sharma