QuadSPI flash: Quad SPI mode vs. QPI mode

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QuadSPI flash: Quad SPI mode vs. QPI mode

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BlueJay
Contributor III

Hello,

currently I evaluate 2 types of flash which is connected to the 4SPI1 interface of the VF6xx:

1. Winbond W25Q32FV

2. Spansion S25FL128S

I have got 2 HW platforms: one is equiped with Winbond flash, the other one is equiped with Spansion flash.

For the evaluation I generate a blinking software in which the QuadSPI configuration parameters are almost identical except DDR mode (byte offset 54)

since the Winbond does not support DDR mode, in the LUT there is only a Fast Read Sequence, RM Chapter 30.8.1.1, page 1287.

For both types of flash the "quad enable" bit of each flash needs to be set to "1" so that the Boot ROM code of VF6xx can boot the app.-code from flash into OCRAM successfully.

Due to the data sheet of the Winbond W25Q32FV it needs explicit a command (0x38) to enter the QPI mode after powerup although the "quad enable" bit is set to "1",

otherwise it remains in "Standard/Dual SPI and Quad SPI" mode. Since the above mentioned command (0x38) for entering into QPI mode does not exist anywhere for the Boot ROM code,

so the Winbond W25Q32FV must remain in "Standard/Dual SPI and Quad SPI" mode after POR.

1. Question: Why does the "quad enable" bit of Windbond flash need to be set to "1" so that the Boot ROM code can boot successfully ?

2. Question: What kind of mode, "Standard/Dual/Quad SPI" mode or QPI mode does the Boot ROM code of VF6xx require ? 

I would be very appreciated for any hints or answers, thank you in advance.

Winbond Data sheet: Publication Release Date: Sept 16, 2013 Rev. H

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jiri-b36968
NXP Employee
NXP Employee

Hello Tai-Phan,

For QUAD mode boot, the Boot ROM expects the Quad Enable bit inside the QSPI Flash to be already set before booting starts. Therefore, the QUAD enable bit must be set in the

non-volatile register of the flash at the time of programming.

Parameters of communication have to be present in the QuadSPI memory. See 19.5.1.5 QuadSPI Configuration Parameters. There can be set SDR/DDR and also 1,2,4 mode and parallel or single mode.

latest RM is rev.7. I guess that you are using previous version

/Jiri

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6,668 Views
jiri-b36968
NXP Employee
NXP Employee

Hello Tai-Phan,

For QUAD mode boot, the Boot ROM expects the Quad Enable bit inside the QSPI Flash to be already set before booting starts. Therefore, the QUAD enable bit must be set in the

non-volatile register of the flash at the time of programming.

Parameters of communication have to be present in the QuadSPI memory. See 19.5.1.5 QuadSPI Configuration Parameters. There can be set SDR/DDR and also 1,2,4 mode and parallel or single mode.

latest RM is rev.7. I guess that you are using previous version

/Jiri

6,667 Views
BlueJay
Contributor III

Hello Jiri, thank you very much for clarifying.

6,667 Views
jiri-b36968
NXP Employee
NXP Employee

Hello Tai-Phan,

You are welcome. In this case, please mark the thread as correct answer. Otherwise it is taken as unanswered. In the case of need we can continue with discussion or you can create another thread.

/Jiri